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6.0 - 10.0 years
8 - 18 Lacs
hyderabad
Work from Office
Role & responsibilities System Architecture & Design Design FPGA-to-ASIC migration paths for PQC accelerators (Kyber, Dilithium, SHA-3). Integrate PQC cores with classical cryptography (AES/RSA) for hybrid security architectures. Define inter-module communication protocols (AXI, SPI, PCIe) and establish trust boundaries. Collaborate with AI engineers to enable adaptive encryption and anomaly detection layers (Q-AI layer). Hardware Prototyping & Validation Implement RTL designs in Verilog/VHDL and simulate using ModelSim or Vivado. Perform synthesis, timing closure, and validation on FPGA development boards. Prepare ASIC-ready netlists and coordinate with EDA workflows (Synopsys DC / Cadence ...
Posted 1 day ago
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