FPGA RTL Firmware Design Engineer

2 - 5 years

4 - 6 Lacs

Posted:3 weeks ago| Platform: Naukri logo

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Job Type

Full Time

Job Description

1.

FPGA RTL Design Engineer

2.

  • Design and implement digital logic using HDLs (VHDL, Verilog) for RADAR and EW signal processing and IO interface applications.
  • Develop optimized RTL code for complex FPGA designs, including high speed interfaces, data paths, and control logic as per

    DO-254

    standard.
  • Perform functional simulation and timing analysis to validate design correctness.
  • Synthesize and implement FPGA designs using tools like Xilinx Vivado, Intel Quartus, Lattice Diamond, Actel Libero IDE.
  • Integrate IP cores and develop custom IPs for specific functionality.
  • Conduct hardware debugging and validation in the lab using logic analyzers, oscilloscopes, and JTAG tools.
  • Collaborate with PCB designers to define FPGA pin assignments and interface requirements.
  • Document design specifications, test plans, and results for internal reviews and compliance as per

    DO-254

    standard.
  • Participate in design reviews, code reviews, and continuous improvement processes.

3.

  • Bachelors degree in Electronics / Electrical Engineering.
  • 3+ years of experience in FPGA design and RTL coding.
  • Strong proficiency in Digital design, RTL coding in VHDL, Verilog.
  • Experience with FPGA design tools (Vivado, Quartus etc.).
  • Familiarity with timing closure, floor planning, and constraint management.
  • Strong proficiency in simulation tools, testbenches, and hardware debugging.
  • Good understanding of digital logic, finite state machines, bus protocols
  • Knowledge of SoC FPGA platforms (e.g., ZynqUltrascale+, Stratix 10 SoC).
  • Strong problem-solving and communication skills.

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Megha Engineering And Infrastructure

Infrastructure and Engineering

Hyderabad

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