FPGA Designer - VHDL/Verilog

Cling Multi Solutions

7 years

0 Lacs

greater lucknow area

Posted:18 hours ago| Platform:

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Skills Required

vhdl verilog design logic subsystems timing drive optimization synthesis xilinx interface ai github development ethernet usb sas vivado simulation simulator electrical engineering solver

Work Mode

On-site

Job Type

Full Time

Job Description

Job

Design, architect, and develop FPGA RTL (VHDL/Verilog) logic and subsystems for high-speed serial protocols.
Address FPGA design challenges such as CDC, multi-clock domains, timing closure, and SerDes-related issues.
Drive timing closure and optimization using FPGA synthesis and implementation tools (Xilinx Vivado).
Debug and validate FPGA and board-level issues, ensuring robust high-speed interface performance.
Collaborate with global R&D teams to deliver production-ready FPGA solutions.
Leverage AI-assisted tools (e.g., GitHub Copilot, LLM-based aids) to accelerate RTL development and productivity.

Requirements

7+ years of FPGA design and development experience.
Strong expertise in any high-speed serial protocols (PCIe, NVMe, CXL preferred; others such as Ethernet, USB 3.x/USB4, SATA, SAS, InfiniBand, DisplayPort, HDMI, or MIPI M-PHY also acceptable).
Proven skills in high-speed FPGA design, including CDC handling, timing closure, and interface validation.
Hands-on experience with FPGA synthesis/implementation tools (Xilinx Vivado: synthesis, place-and-route, timing closure, on-board debug).
Experience with FPGA simulation tools (ModelSim, Questa, VCS, or Vivado Simulator) for design validation.
Degree in Electrical or Electronics Engineering from Tier-1 colleges (IITs, NITs, or equivalent) preferred.
Proactive problem-solver with enthusiasm, energy, and a hands-on approach.

(ref:hirist.tech)

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FPGA Designer - VHDL/Verilog