Engineer- Digital Design

0 - 2 years

0 - 1 Lacs

Posted:2 months ago| Platform: Naukri logo

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Job Description

Walk-in-Interview Role & responsibilities: About the Role: Engineer Digital Design The position involves development of digital subsystems in a complex SoC with multi-core, multi-threaded processor subsystems, AI accelerators, interconnects, memory architecture with multi-level caches, multiple clocks and resets, high-speed interfaces and peripherals. The chosen candidate would do the architecture, microarchitecture and design and verification and would be responsible for the entire design flow and sign-off, including synthesis, LEC, Formality and STA, and be able to deliver reusable and robust digital IP. Prior Experience Hands-on experience or Academic Projects involving one or more high end digital designs like multi-core, multi-threaded processor subsystems, high speed interfaces (PCIe, Ethernet, LPDDR, HBM), high performance digital accelerators (Tensor Processing units, Convolution engines, other high performance digital accelerators) Exposure to design sign-off flows including Lint, CDC, Synthesis, LEC, STA, and Timing Closure . Familiarity with low-power design methodologies. Skills Required Technical Expertise: Verilog, SystemVerilog, and scripting languages (Python, Perl, Tcl, Shell). Processor Knowledge: RISC-V, ARM architectures, and protocols like AXI, APB, AHB. Design Tools: Experience with ASIC and FPGA design flows, DFT (Scan, MBIST, BScan), and UVM methodology. Analytical Skills: Strong problem-solving abilities with attention to detail. Low Power Design: Techniques like clock gating, power gating, and dynamic voltage/frequency scaling. Communication: Good teamwork and collaboration skills, eager to learn and grow Walk-in Interview Details Dates: April 5, 6, 12, 13, 19, 20 Time Slots: Please select your preferred timeslot for the interview via the link provided: https://calendly.com/careers-ceremorphic Location: Ceremorphic Technologies Interview Process: The walk-in interview will include a 1-hour written test . Eligibility Criteria : Education: B.Tech/BE or M.Tech/MS in Electronics or Electrical Engineering Aggregate: 70% or above Experience: 0-2yrs What to Bring : An updated resume A valid govt ID for verification We look forward to meeting you and discussing how you can contribute to our dynamic and innovative team at Ceremorphic Technologies . Regards Ceremorphic Hiring Team

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Ceremorphic Inc
Ceremorphic Inc

Technology / AI Solutions

San Jose

51-200 Employees

1 Jobs

    Key People

  • Dr. Jane Doe

    CEO & Co-Founder
  • John Smith

    CTO

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