Posted:1 day ago|
Platform:
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Full Time
Education: BTech/MTech degree in Electrical/Electronics/Computer science from a reputed institute Job Responsibilities: Translate requirements to design specification by working closely with system architects Translate the design specification to optimal digital micro-architecture RTL coding using Verilog and System Verilog Continuously improve the development and support model employed on Digital Processing sub-systems to ensure a high level of scalability and efficiency in product engagements Support simulation, DFT and silicon verification and validation of sub-systems, test and evaluation of ASIC products and FPGA development systems Meet power, performance and area goals by micro-architecture optimization Work closely with DV team to develop test-plans Front end implementation - Lint/CDC , synthesis, Timing constraint development Support Silicon validation Job Requirements: BTech/MTech degree in Electrical/Electronics/VLSI with 3-6 years of experience from reputed institutes Strong hands-on RTL coding experience and debugging skills Expertise in timing constraints development and critical path timing closure Coding up in C tests on M3 Series Cortex based products. Expertise in automation and scripting languages like Perl, Python, and shell scripting Proficient in Version control systems, such as Perforce, SVN, SOS Proficient in Verilog, System Verilog and UVM Ability to manage multiple tasks and work effectively in a fast-paced environment Able to communicate effectively
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