Design Verification - Lead Engineer

General Summary:

Join Qualcomms cutting-edge hardware engineering team to drive the design verification of next-generation SoCs, with a focus on wireless technologies including WLAN (IEEE 802.11). You will work on IP and subsystem-level verification, collaborating with cross-functional teams to deliver high-performance, low-power silicon solutions. A strong understanding of on-chip buses and bridges is essential to ensure seamless integration and performance across subsystems.

Key Responsibilities:

• Develop and execute verification plans for complex SoC designs and IP blocks.
• Architect and implement testbenches using System Verilog and UVM/OVM methodologies.
• Perform RTL verification, simulation, and debugging.
• Collaborate with design, architecture, and software teams to ensure functional correctness.
• Contribute to IP design reviews and sign-off processes.
• Support post-silicon validation and bring-up activities.
• Analyze and verify interconnects, buses (e.g., AMBA AXI/AHB/APB), and bridges for performance and protocol compliance.
• Conduct CPU subsystem verification (ARM/RISCV) including coherency, cache behavior, and interrupt handling.
• Perform power-aware verification using UPF/CPF and validate low-power design intent.
• Execute performance verification to ensure bandwidth, latency, and throughput targets are met.
• Perform Gate level and Timing Simulations to sign off on Timing closure.
• Analyze and verify serial peripherals like (UART/SDIO/SPI) and validate the Datapath integrity.

Preferred Skills & Experience:

• Deep understanding of bus protocols and bridge logic, including hands-on experience with AXI, AHB, and APB.
• Experience with CPU (ARM/RISCV) subsystem verification and performance modeling.
• Familiarity with wireless protocols (IEEE 802.11 a/b/g/n/ac/ax/be) is a plus.
• Proficiency in SystemVerilog, UVM/OVM, Verilog, and scripting languages (Perl, Tcl, Python).
• Experience with power-aware verification methodologies and tools (e.g., UPF, CPF).
• Familiarity with performance verification techniques and metrics.
• Exposure to tools like Clearcase/Perforce and simulation/debug environments.
• Strong analytical, debugging, and communication skills.

Minimum Qualifications:

• Bachelors or Masters degree in Electrical/Electronics Engineering, Computer Science, or related field.
• Relevant experience in hardware design and verification
• 4-15 years of experience in digital design and verification.