Design Verification Engineer

The ideal candidate should possess general verification expertise with a strong background in System Verilog and UVM. It is essential to have a solid understanding of ARM processor based SOCs, AXI/AHB protocols. Additionally, the candidate should have a good grasp of Processor based C tests for SOC verification, including test coding, compilation, loading in the testbench, and failure debugging. The successful candidate must have hands-on experience in test development, simulation, and proficiency in using popular EDA tools. It is crucial to have good debug skills and a proven track record of effectively resolving issues in past projects. The candidate should demonstrate a logical and methodical approach to debugging problems and failures, utilizing standard tools as applicable. Overall, the candidate should be a detail-oriented individual with a strong technical background and a proactive attitude towards problem-solving.,