Design Engineer 2

4 - 8 years

0 Lacs

Posted:2 weeks ago| Platform: Shine logo

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Work Mode

On-site

Job Type

Full Time

Job Description

As an experienced Physical Design Engineer at Tessolve in Bangalore, you will be responsible for the end-to-end physical design flow from RTL to GDSII at advanced technology nodes such as 7nm, 5nm, or below. Your key responsibilities will include: - Optimizing chip area, power, and performance through floorplanning and partitioning. - Optimizing standard cell placement, buffer insertion, and clock tree synthesis during placement and CTS. - Working on congestion analysis, RC extraction, and static timing analysis for routing and timing closure. - Implementing low-power techniques like clock gating, power gating, and multi-voltage domains for power optimization. - Performing DRC, LVS, and Antenna checks using industry-standard tools for physical verification. - Analyzing IR drop, Electromigration (EM), and Signal Integrity (SI) for sign-off analysis. - Collaborating with RTL design, DFT, and verification teams to ensure design convergence. - Resolving timing, power, and physical verification issues effectively. To excel in this role, you should possess: - 4 to 8 years of experience in Physical Design and Implementation. - Strong expertise in EDA tools such as Synopsys ICC2/Fusion Compiler, Cadence Innovus, or Mentor Olympus. - Proficiency in floorplanning, power planning, placement, routing, and timing closure. - Experience in Static Timing Analysis (STA) using Primetime or Tempus. - Hands-on experience with physical verification tools like Calibre, PVS, or Pegasus. - Good understanding of design constraints, clock tree optimization, IR drop, and power integrity. - Knowledge of scripting languages (Tcl, Perl, Python) for automation is a plus. - Strong problem-solving skills and ability to thrive in a fast-paced environment. Preferred qualifications for this role include experience with 7nm, 5nm, or lower process nodes, knowledge of low-power design methodologies, and familiarity with multi-power domain design (UPF/CPF-based flows). At Tessolve, you will have the opportunity to work on cutting-edge semiconductor technology, gain exposure to advanced process nodes and complex designs, and be part of a collaborative and innovative work environment while enjoying a competitive salary and benefits. If you are passionate about Physical Design and seek an exciting opportunity, apply now to join Tessolve.,

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Tessolve logo
Tessolve

Semiconductor and Electronics Engineering

N/A

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