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ASIC Digital Design, Sr Engineer - AMS Verification

ASIC Digital Design, Sr Engineer - AMS Verification

Synopsys

2 - 7 years

5 - 9 Lacs

Hyderabad / Secunderabad, Telangana Telangana India

Posted:2 months ago| Platform: Foundit logo

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Skills Required

CMOS VMM Uvm

Work Mode

On-site

Job Type

Full Time

Job Description

What You ll Need: Looking for 2+yrs experience with BTech / MTech in VLSI / Electronics/Microelectronics Knowledge or hands-onexpertise/analysis of Analog and digital CMOS circuit designs Knowledge on electrical circuit networks and analysis Knowledge or hands-on Verilog/System Verilog languages and supported methodologies like VMM, UVM Must be able write/modify testcases, checkers, scoreboards in a system Verilog based test environment AMS verification experience in high speed Serdes designs supportingmulti-protocols is an advantage. Experience with the Synopsys Analog mixed-signal design tool set is an advantage. Modelling languages Verilog-a/ams can be an advantage Programming/scripting know-how e. g. tcl, perl, python Experience with Linux Good communication skills, ability to take ownership Self-organized to ensure that project timescales are met

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ASIC Digital Design, Sr Engineer - AMS Verification