TECHNICAL LEAD - LEAD

7 - 18 years

9 - 20 Lacs

Posted:5 hours ago| Platform: Naukri logo

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Job Type

Full Time

Job Description

  • 7 to 18 years

    of experience in RTL design skills in

    VHDL

    with knowledge of digital signal processing fundamentals
  • Proficient in

    MATLAB/Simulink

    for algorithm modeling, fixed-point conversion, and simulation
  • Solid understanding of

    ORAN

    domain control and data planes
  • Experience in lower and upper layer protocol implementation in wireless domain
  • Experience in wireless stack packet processing Layer 2/Layer 3 switching etc.
  • Familiarity with verification methodologies desirable

    (UVM/SystemVerilog preferred)

  • Exposure to

    FPGA

    design flow including synthesis, implementation, STA and timing closure
  • Exposure in

    AMD

    and Altera tool flows hands on experience on

    Altera Agilex FPGA or AMD(Xilinx) Zynq RFSoC

    highly desired
  • Good debugging skills and ability to analyze RTL and simulation mismatches

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