Staff Verification Engineer

Western Digital

5 - 7 years

7 - 9 Lacs

bengaluru

Posted:11 hours ago| Platform:

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Skills Required

automation c++ simulation vlsi digital design coding analog perl system verilog python

Work Mode

Work from Office

Job Type

Full Time

Job Description

Job responsibilities:

Develop test plans, tests and verification infrastructure for a complex IP/Sub-System or lead major deliverables for SoC
Create verification environment using UVM methodology
Hands on in end to end Logic Verification Process including Verification Planning, Functional Coverage planning and development, Test case development, regression, debug and Coverage closure
Create reusable bus functional models, monitors, checkers and scoreboards
Drive functional coverage driven verification closure.
Work with architects, designers, and post-silicon teams
Hands-on contributions to SVA development like coding, porting and maintaining System Verilog Assertions including Formal Verification
Development of tools for Design and Verification support
Debug failures and root-cause it by interacting with other teams/groups Etc.Qualifications

5 to 7 years of relevant experience

- Education:

B.E/B.Tech/M.Tech in ECE/VLSI/Electrical Engineering

Skills Required/Preferred:

- Software Skills Required:

Proficiency in Computer Science fundamentals object oriented design, data structures, algorithms, design, problem solving, and complexity analysis
Basic knowledge of with c, c++, SystemC, perl, python, tcl, shell is preferable

Functional Verification:

Unit/Sub-system/SOC level verification experience
Experience in leading verification closure of complex IP/SOC for at least one project
Exposure to industry standard verification tools for simulation and debug
RTL Gate Level Simulations
Proficiency in Verilog, System Verilog , Assertions and UVM
Exposure to Verification Fundamentals
Verification Automation using scripts like Python, Perl,shell,tcl/tk
Good debugging and problem solving skills.
Good communication skills and ability, desire to work as a team player
Exposure to Analog verification will additional plus point
-
Digital design Concepts

- CMOS VLSI, Digital Circuits

- Knowledge on Memory (preferred)

(SRAM/DRAM/ROM/
Flash
) Circuits/Logic

- Preferred exposure

- NCSIM,
Xcellium
, IMC, IEV, Verdi, Jaspergold, VS Formal
- Cadence Schematic and layout environment

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