Staff RTL Design Engineer

Synopsys

5 - 10 years

6 - 7 Lacs

Bengaluru

Posted:1 day ago| Platform:

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Skills Required

Automation ASIC Semiconductor VLSI Digital design USB Analytical Circuit designing Verilog Perl

Work Mode

Work from Office

Job Type

Full Time

Job Description

Architecting and implementing advanced RTL designs for next-generation high-performance DDR PHY and related IP cores.

Analyzing and interpreting standard and functional specifications to create detailed architecture and micro-architecture documentation for medium to high complexity features.
Executing hands-on RTL coding, synthesis, CDC analysis, and debug, ensuring robust and efficient designs.
Developing and executing comprehensive test plans to validate functional correctness and performance.
Collaborating with global teams and interacting with customers to understand and refine specification requirements.
Mentoring junior engineers, providing technical guidance, and potentially leading small project teams to drive successful project outcomes.
Continuously improving design flows and methodologies by leveraging feedback and industry best practices.

The Impact You Will Have:

Advance the performance and reliability of industry-leading IP cores, directly contributing to Synopsys reputation for technical excellence.
Enable customers to deliver cutting-edge products by providing robust, high-quality digital design solutions.
Drive innovation in the development of next-generation memory and interface technologies.
Foster a culture of technical mentorship and knowledge sharing within a global engineering team.
Strengthen Synopsys collaborative relationships with key industry partners and customers.
Shape the future of silicon design through your technical contributions and leadership.

What You ll Need:

Bachelor s or Master s degree in EE, EC, VLSI, or related field, with5+ years of relevant industry experience.
Strong hands-on experience in RTL design using Verilog/SystemVerilog for ASICs, including data path and control path architecture.
Expertise in design trade-offs (area, latency, throughput) and familiarity with protocols such as DDR, PCIe, USB, or HBM.
Proficiency with synthesis, CDC analysis, lint, static timing analysis, and formal verification flows.
Experience in developing and interpreting functional specifications, and translating them into detailed design documents.
Knowledge of scripting languages (Perl, Shell) for automation is a plus.
Prior experience as a technical lead or mentor is highly desirable.

Who You Are:

Innovative and detail-oriented, with a strong analytical mindset.
Effective communicator who thrives in collaborative, cross-cultural environments.
Proactive problem solver with a high degree of initiative and ownership.
Team player who values diversity and inclusivity in thought and approach.
Resilient, adaptable, and eager to continuously learn and grow.
Strong leadership and mentoring skills, with a passion for developing others

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