Staff Engineer, Design Verification Engineering

Job Description

About Analog Devices Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures todays innovators stay Ahead of Whats Possible . Learn more at www.analog.com and on LinkedIn and Twitter (X) . AMS Verification Lead - Isolation group Analog Devices is seeking an experienced Analog Mixed Signal Verification engineer to join its Interface Isolation group based at its Bangalore Research Development offices in India. The group is the market leader in galvanic safety isolation products due to its proprietary iCoupler transformers and More Than Moore wafer fabrication technologies. As these technology capabilities advance there is an emerging need for greater complexity in the digital and mixed signal verification requirements to bring next generation ground-breaking products to the Medical, Industrial and Test Measurement markets. Role Lead the AMS verification effort of devices Contribute towards verification strategy and methodology improvement Understand device requirements and come up with traceable AMS verification plan Hands on contribution to AMS top level verification effort Lead a team of AMS engineers/contractors Code/generate SVRNM models of required analog blocks and validate against schematic. Develop directed tests in AMS environment or reuse constrained random UVM testcases Interface with global design teams through various phases of verification File and track bugs to closure in Jira Document results of assigned blocks and review the results with the team Requirements Bachelor of Engineering degree in electrical/electronic engineering or comparable degree 8+ years experience in chip level AMS (analog mixed signal) verification of SOC Familiarity with latest digital verification methodologies like digital mixed signal verification(DMS) using UVM Experience with mixed signal simulators such as Cadence AMS or equivalent Experience in running GLS and scan sims from top level Experience with SVRNM or verilogams behavioural model coding for analog blocks Team player with good analyzing and debugging skills Open to adopting new tools and flows Must have good verbal and written communication skills to work effectively with teams spread geographically