Jobs

Interviews
Job Alerts
Tools

Upskill and Grow with AI

Mock Interview Practice interviews in realistic simulations

Coding Practice Improve your coding skills with challenges

Certification Earn certifications to validate your skills

AI Learning Get trained with AI expert sessions

Career Path AI insights for smarter career decisions

AI Job Match Score AI-Powered Job Match Against Your Resume and Optimize Your Resume

Career Tools and Resources

Resume Builder Build Professional Resume with Ease

ATS Friendliness Check Check Resume Friendliness for Applicant Tracking Systems

Auto Apply Apply to hundreds of jobs on any platform effortlessly

Co-Pilot (Chrome Extension) Your AI Assistant for Seamless Browsing Efficiency

Interview Questions Streamline interviews with ready-to-use questions

Salaries Discover market-driven salary insights across skillsets and geographies

Companies Explore leading companies actively hiring talent
For Employers

Jobs

Interviews

Home
>
Jobs in hyderabad
>
Microchip Technology
>
Senior Technical Staff Engineer - DFT

Senior Technical Staff Engineer - DFT

Microchip Technology

15 - 20 years

50 - 65 Lacs

hyderabad

Posted:2 days ago| Platform:

Apply

Skills Required

automation vhdl asic prototype simulation fpga verilog automotive design engineer physical design

Work Mode

Work from Office

Job Type

Full Time

Job Description

Job Description:

We are seeking a DFT (Design for Test) Architect & Implementation Engineer with expertise in designing and implementing DFT networks for SoC (System on Chip) devices with mixed ASIC and custom content . The ideal candidate will drive the DFT strategy , develop test methodologies , and work hands- on in integrating DFT features into the designs. This role requires deep knowledge of scan networks , scan insertion, boundary scan (JTAG), MBIST, ATPG, and fault coverage analysis .

Key Responsibilities:

DFT Architecture & Strategy:

Define and develop DFT methodologies for ASIC designs to ensure high testability and fault coverage.
Architect and implement scan, JTAG, and memory BIST (MBIST) .
Optimize DFT strategy to balance test coverage, performance, and area constraints .

Hands- On Implementation:

Develop and integrate DFT structures such as scan networks, scan chains, boundary scan, MBIST, LBIST, and built- in self- test (BIST) .
Generate and verify ATPG (Automatic Test Pattern Generation) patterns for fault coverage analysis.
Work with RTL design engineers to ensure DFT compliance in Verilog/VHDL- based designs.
Run fault simulation, stuck- at and transition fault testing , and analyze coverage reports.

Collaboration & Validation:

Work closely with RTL, synthesis, and physical design teams to ensure DFT design integrity .
Collaborate with manufacturing and validation teams to implement test strategies for prototype bring- up .
Debug and optimize DFT networks to achieve minimal test times .
Work with EDA vendors to evaluate and integrate latest DFT tools and methodologies .

Requirements/Qualifications:

15+ years of experience in DFT architecture and implementation .
Strong expertise in FPGA- based DFT methodologies (Xilinx, Intel/Altera, Lattice, etc. ).
Proficiency in Verilog/VHDL for FPGA design and test logic implementation.
Hands- on experience with DFT tools (Synopsys DFT Compiler, Tessent, Mentor Tessent, Cadence Modus, or similar).
Strong knowledge of JTAG (IEEE 1149. 1, 1149. 6) , scan insertion, ATPG, MBIST, LBIST, and fault modeling.
Experience in timing analysis and synthesis- aware DFT implementation .
Familiarity with FPGA prototyping and board bring- up .
Hands- on scripting skills in Python, TCL, Perl, or Shell for DFT automation.

Preferred Qualifications:

Experience in AI/ML- driven DFT automation .
Knowledge of high- speed interfaces and SERDES testing .
Experience with post- silicon validation and ATE (Automated Test Equipment) .
Strong debugging skills using logic analyzers, oscilloscopes, and FPGA tools .
Why Join Us
Work on cutting- edge FPGA- based designs for high- performance computing, automotive, or AI applications .
Opportunity to architect and implement industry- leading DFT methodologies .
Be part of a highly skilled team pushing the boundaries of FPGA design & test innovations .

More Jobs at Microchip Technology

Technical Staff Engineer - Design For Test

Hyderabad

3 - 8 yrs

INR 11 - 15 Lacs

Senior Manager-Product Management

Bengaluru

8.0 - 13.0 yrs

INR 25 - 30 Lacs

Analyst - Accounting

Bengaluru

5.0 - 8.0 yrs

INR 7 - 10 Lacs

Senior Engineer II - Verification

Hyderabad

5.0 - 8.0 yrs

INR 14 - 16 Lacs

Senior Engineer II-Design For Test

Bengaluru

2.0 - 11.0 yrs

INR 14 - 16 Lacs

Mock Interview

Practice Video Interview with JobPe AI

Start Job-Specific Interview

Start Your Job Search Today

Browse through a variety of job opportunities tailored to your skills and preferences. Filter by location, experience, salary, and more to find your perfect fit.

Job Application AI Bot

Apply to 20+ Portals in one click

Download Now

Download the Mobile App

Instantly access job listings, apply easily, and track applications.

Enhance Your Skills

Practice coding challenges to boost your skills

Start Practicing Now

Microchip Technology

Login to

Please Verify Your Phone or Email

Confirm Action

Search

Profile

Upskill and Grow with AI

Senior Technical Staff Engineer - DFT