Senior / Staff CPU DV Design Automation Engineer

General Summary:

As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.

Minimum Qualifications:

Exciting opportunity to work on Digital Flows/Methodologies architecture and development in energetic multi-site CAD team atQualcomm.
Our team support Simulation, Emulation, Formal Verification and Post Silicon domains providing ample opportunities to grow and contribute.

Responsibilities

• As a Design Automation Engineer, you will work with RTL, architecture, design, DV, software, and silicon verification users.
• Develops, maintains, debugs and tests CPU Design Methodologies using Commercial EDA tools
• Defines and creates flows/scripts to help design teams execute Front-End (RTL) flows seamlessly
• Create unit, integration, regression, and/or system-level tests to thoroughly validate new features or changes.
• Work closely withEngIT teams to setup flows which work well with the Engineering Compute Infra at multiple Datacenters
• Work closely with design teams to define methodologies, drive flow development, and deploy vendor tools
• Interfaces with external vendors to define, drive and incorporate the latest design solutions to improve productivity and time to market.
• Support design engineers on the flow setup and resolve their queries, automate tasks through appropriate tools and scripting.
• Review and debug code to identify and fix code problems.

Qualifications

• Proficient with Python development and strong working knowledge of Linux operating systems
• Must have worked on Digital flows/methodologies development in the DV domains.
• Should have proficient skills with one of DV related toolsXcelium/VCS/vManager/Indago/ Verdior equivalent.
• Experience with CI/CD platform (like Airflow and Jenkins) and Version Control System (like Perforce and/or Git).
• MS/BS in Electrical/Computer Engineering with 8-14 years of demonstrated experience in CAD or EDA tools flows architecture, development, and support.
• Demonstrated experience with various EDA software, flows, and architectures & driving EDA vendors to provide feature enhancements and bugfixes.
• Ability to document design methodologies & provide training on tools and workflows to design teams
• Strong skills in debugging and analyzing techniques to understand existing scripts/flows; Ability to work independently and explore new domains
• Proven track record of pushing Prior experience debugging vendor tool problems
• Strong written and verbal interpersonal skills and track record of success in a collaborative team environment.