Senior Engineer-Sign Off Engineer

6 - 10 years

40 - 50 Lacs

Posted:1 day ago| Platform: Naukri logo

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Job Type

Full Time

Job Description

We are seeking outstanding expertise in EDA tool-flows and automation specifically tailored for meticulous optimization of power, performance, area, signoff and silicon quality. The role brings opportunity to collaborate with foundry, EDA and ecosystem partners in 3nm/2nm technodes and multi-die.

Responsibilities:

  • Develop CPU STA and/or PDN sign-off flow for best-in-class Fmax and Power/GHz.
  • Develop PVT, Vdrop and thermal aware methodology and flows enabling custom techniques in multi-voltage design, advanced clocking, critical path analysis and variation.
  • Infuse innovative industry tools and internal developed statistical, analytical algorithms and machine learning methodologies to develop and refine STA and IR-PDN-Thermal bottlenecks.
  • The suitable candidate will be able to analyze the requirements, define and develop CAD solution including external EDA tools integration.

Required Skills and Experience:

  • Experience with IP model, STA and PDN analysis and leading EDA tools.
  • Strong understanding of CCS, OCV, LVF, Static/Dynamic IR, EM concepts
  • Hands-on experience with analyzing data, reports.
  • Strong coding proficiency in languages Python, C, Tcl.
  • Proficiency with version control systems like git, distributed processing, and disk management.
  • Ability to work with evolving problem statements and solutions. Excellent interpersonal skills, communication, team spirit and effective collaboration with multi-functional teams.

Nice To Have Skills and Experience:

  • Experience with SoC design flows, IR and STA convergence and subject areas with a focus on advanced nodes signoff and multi-die is highly desirable.

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ARM Embedded Technologies logo
ARM Embedded Technologies

Technology / Embedded Systems

San Jose

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