Posted:1 day ago|
Platform:
On-site
Full Time
Purpose:
The Design for Testability (DFT) engineering organization at L&T Semiconductor Technologies (LTSCT) pioneers innovative methods and technologies in the areas of DFT architecture, verification, and post-silicon bring-up of state-of-the-art semiconductor chips, such as System on a Chip (SoCs), developed using the latest semiconductor technology nodes.
Areas of Responsibilities:
.Lead and manage the DFT team to achieve project goals.
.Implement various DFT techniques, including:
. Conduct DFT simulations and analyze results to ensure comprehensive test coverage and high quality.
. Debug and resolve DFT-related issues throughout the design process.
Larsen & Toubro Limited
Upload Resume
Drag or click to upload
Your data is secure with us, protected by advanced encryption.
Browse through a variety of job opportunities tailored to your skills and preferences. Filter by location, experience, salary, and more to find your perfect fit.
We have sent an OTP to your contact. Please enter it below to verify.
Instantly access job listings, apply easily, and track applications.
bengaluru, karnataka, india
Salary: Not disclosed
bengaluru
4.0 - 6.8 Lacs P.A.
hyderabad
4.0 - 8.0 Lacs P.A.
hyderabad, telangana
Salary: Not disclosed
4.0 - 6.0 Lacs P.A.
hyderābād
3.29244 - 9.0 Lacs P.A.
hyderabad, telangana
Salary: Not disclosed
7.0 - 11.0 Lacs P.A.
Hyderābād
3.0 - 9.0 Lacs P.A.
