Job
Description
We Are: At Synopsys, we drive the innovations that shape the way we live and connect Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content Join us to transform the future through continuous technological innovation, You Are: You are a dynamic engineer with working experience in SOC-level functional verification and strong understanding of AXI and High-speed IO protocols like PCIe and USB You should have a passion for working with the best of the brains in the industry in developing end to end solutions and deploying them at our premier customer base Your technical excellence, analytical skills, coupled with strong communication and interpersonal skills, make you a valuable asset to any team You excel in communication, teamwork, and multitasking, and have experience working in cross-functional, multi-site environments, What Youll Be Doing: Working closely with a world-class R&D team, youll be at the center of developing and bringing an end-to-end solution to our wide variety of customers in the domain of Silicon Lifecycle Management (SLM), Working closely with customers, you will bring the detailed requirements into the factory to enable R&D for a strong, robust, and successful product development, Working closely with product development team, you will validate and end-to-end solution both internally (before shipment) as well as in customer environment, Driving the deployment and smooth execution of SLM solutions into customersprojects, Enabling customers to realize the value of silicon health monitoring throughout the lifecycle of silicon bring-up, validation, through in-field operations, The Impact You Will Have: Enhancing SynopsysSilicon Lifecycle Management (SLM) IP portfolio and end-to-end solution, Driving the adoption of SynopsysSLM solutions at premier customer base worlwide, Influencing the development of next-generation SLM IPs and solutions, What Youll Need: BSEE/MSEE in Electrical Engineering, Computer Engineering, or related field, 4+ years of hands-on experience with SoC-level functional verification or Design-for-Test (DFT) or both, Good knowledge of AXI, APB Background in verification, with at least sub-system level verification Debugging abilities to identify issues in functional verification, Knowledge of DMA, ideally should have verified a sub-system with DMA Knowledge of High-speed IO sub-systems like PCIe and USB A thorough understanding of memory mapping concepts is essential, End to end knowledge of how transactions/data flow between the HSIO interface to/from memory Knowledge and experience with Memory BIST/DFT/ATE/SLT/any other test solutions Ability to evaluate technical suggestions from customers and work with internal teams (product management/R&D) to make decisions Customer facing experience is a plus educating/guiding customer on technical details of a solution Good to have: Hands-on debug experience of silicon is a plus Some programming experience to write/debug simple drivers in C Detailed knowledge of the PCIe and USB protocols Architecture/micro-architecture experience Working with FPGAs The Team Youll Be A Part Of: As part of the Silicon Lifecycle Management (SLM) solutions team, you will collaborate with global R&D teams to develop world-class IPs and end-to-end solutions to address silicon health issues at premier data center, AI, and automotive customers Our team is dedicated to bringing solutions to enhance the life of a silicon anywhere it belongs,
