Semi conductor design engineer

As a Semiconductor Design Engineer at our company, you will be responsible for the following: - Hands-on experience in developing and understanding building block schematics, memory schematics, and running circuit simulations using spice simulators for DC and transient analysis. - Ability to decipher circuit behavior from schematics and familiarity with circuit characterization, timing libraries, and timing arcs. - Experience in working with Verilog MOS switch level models, netlist simulation with various delay simulations, and static timing analysis. - Proficiency in Gate level simulations with SDF back annotation, debugging SDF annotation issues, and ensuring good annotation coverage. - Hands-on experience with latch-based designs, understanding their timing requirements, and debugging gate-level simulation failures. - Capability to perform root cause analysis of failures and conduct what-if analysis for issue resolution. - Knowledge of System Verilog Assertions to specify expected design behavior, with familiarity in UVM being a plus. - Strong communication skills to effectively communicate complex technical concepts to design peers in both verbal and written forms. - Experience in gate-level simulation, spice correlation, debugging failures, and providing fixes at gate or transistor level as needed. You will be working in Hyderabad and should have 1 to 3 years of relevant experience in semiconductor design.,