Product Validation Engineer II

As a Product Validation Engineer at Cadence Design Systems, you will be a crucial part of the Modus R&D team, focusing on validating and supporting Design-for-test (DFT) technologies. Your role will involve working on complex problems that require innovative thinking, debugging customer reported issues, and collaborating with R&D to provide out-of-box solutions with an emphasis on robustness, PPA, and scalability. **Key Responsibilities:** - Work on insertion and validation of DFT technologies such as 1500 Wrapper, Compression, RTL DFT, Low Pin Count Test, Hierarchical Test, LBIST, etc., using Cadence Synthesis tool Genus and ATPG using Cadence Test tool Modus on in-house and customer designs. - Create test plans for verifying new features, develop new test cases, and apply Design & DFT skills; Report bugs/enhancements in the tool. - Collaborate with R&D and Product Engineering teams to review feature specifications, test plans, and customer issues. - Debug customer-reported issues and propose/implement measures to address them effectively. **Qualification Required:** - B.E/B.Tech with 2+ years or M.E/MTech in Electronics/Electrical with experience in Digital electronics and Verilog. - Strong understanding of DFT techniques and methodologies. - Familiarity with Test standards like 1149.1, 1500, 1687 is a plus. - Experience with Cadence Test or other Test tools is preferred. At Cadence, you will be working with Modus, a DFT (Design for Testability) software tool used by leading chip design companies during DFT synthesis & ATPG (Automatic Test Pattern Generation) phase of chip design. Join us in solving challenging problems and making a meaningful impact in the world of technology.,