You will work as a Principal Concept Engineer in our Automotive Microcontroller Development Team as part of the Chip-level Architecture group. You will join a team of SoC Architects with leading the development of chip-infrastructure related architectural blocks, translating customer requirements as well as defining integration and functional requirements. You will drive the realization throughout all development stages.
In your new role you will:
- Drive architecture and development of the chip-level infrastructure functionality of our next-generation Automotive Microcontroller platforms with a focus on the analog architecture of the clock infrastructure.
- Influence the platform clocking microarchitecture with its analog/digital design partitioning and the specification of the targeted complex analog IPs (PLLs, XTAL OSC, FLL, Clock Buffers, etc) to achieve a well-shaped design partitioning
- You steer the design and integration work together as a small team of clock experts. You will work with various stakeholders such as analog development groups, project management or verification teams and be the primary contact for all analog aspects of the clocking infrastructure.
- You will provide analog technical guidance to peers as part of a lead role with a holistic view of the chip.
- Bring in innovation, break down higher-level stakeholder and product requirements to hardware and software requirements and define solution concepts.
- Create and maintain technical documentation with following internal documentation standards to guarantee the ISO 26262 compliance
- Mentor junior colleagues and support their technical growth
- Execute your work with following an agile working style
- Network cross-functionally with cluster architects, system engineers, application engineers, functional safety experts, design, verification and validation teams within and beyond your business unit to promote your state-of-the-art development strategy
- Drive Concept and Design reviews for Analog Circuits being developed, ensure best practices is followed
- Ensure Functional Safety compliance for all IP Developments
- Drive and contribute to initiatives to improve R&D efficiency
- As a Principal Engineer Concept Engineering, you listen actively to the customer and consider his point of view, thoughts, and ideas. Furthermore, you tackle change actively to reach your ambitious goals. Lastly, you work conscientiously on making things better, faster, and more efficient.
You are best equipped for this task if you have:
- A degree in Electronic Engineering, Industrial Engineering or similar
- At least 13+ years of relevant working experience in chip development
- Very good knowledge of Analog Circuit Design, experience with clocking application related IP development (PLLs, DLLs, FLLs, XTAL OSC, Clock Buffers, etc)
- Proven Track Record of micro-architectural design work for clocking application related Analog IPs
- Basic Knowledge of Digital IC Design with using Sytem Verilog
- Good knowledge of requirements driven workflows
- Basic knowledge of functional safety standards and applications e.g. ISO 26262
- Experience in writing User Manuals and defining Datasheet values beneficial
- Strong analytical skills, pragmatic problem solving with the ability to think critically and strategically
- Working experience in international and cross-functional technical teams within a multicultural environment
- Good in communication in English
Contact:
Gowri Shenoy, LinkedIn
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