Principal Engineer AMS SoC Architect

• Drive execution and development of chip-level infrastructure related architectural blocks (Clocking, IOs, ESD, Padring, etc.) with a focus on Clocking infrastructure and all analog IPs to it

• You steer the design and integration work of involved design teams for the clocking architecture of our state-of-the-art automotive microcontrollers together with peers.
• You will be a primary chip-level contact about analog clocking topics for internal stakeholders such as analog development groups, project management or verification teams. You will provide analog technical guidance to peers as part of a lead role with a holistic view of the chip.

• You will support peers with your analog expertise for chip-level infrastructure related analog IPs
• Bring in innovation, break down higher-level stakeholder and product requirements to hardware and software requirements and define solution concepts .
• Create and maintain technical documentation with following internal documentation standards to guarantee the ISO 26262 compliance
• Mentor junior colleagues and support their technical growth
• Plan and monitor your work with following an agile working style
• Network cross-functionally with cluster architects, system engineers, application engineers, functional safety experts, design, verification and validation teams within and beyond your business unit to promote your state-of-the-art development strategy
• Drive for Concept and Design reviews of new Analog Circuits being developed
• Ensure Functional Safety compliance for all IP Developments
• Drive and contribute to initiatives to improve R&D efficiency

• A degree in Electronic Engineering, Industrial Engineering or similar
• At least 15+ years of relevant working experience in chip development
• Proven Track Record of relevant micro-architectural design definition and Clocking-infrastructure related IP design
• Basic Knowledge of Digital IC D esign with using Sytem Verilog
• Very good knowledge of Analog Circuit Design , experienced with clocking IPs and chip-level infrastructure related IPs (IOs, PADRING, ESD, etc)
• Good knowledge of requirements driven workflows
• Basic knowledge of functional safety standards and applications e.g. ISO 26262
• Experience in writing User Manuals and defining Datasheet values beneficial
• Strong analytical skills, pragmatic problem solving with the ability to think critically and strategically
• Working experience in international and cross-functional technical teams within a multicultural environment
• Fluent in Communication

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