9 Palladium Jobs

We are looking for experienced Pre-Silicon Emulation Engineers to join our client's growing team. The ideal candidate will have hands-on experience in emulation tools, design verification methodologies, and a deep understanding of SoC or ASIC-based system modeling. You will work closely with cross-functional teams to accelerate hardware-software co-verification and system validation in the pre-silicon phase. Key Responsibilities: Develop and execute emulation-based verification strategies for complex systems and SoCs. Work with emulation platforms such as Palladium, Zebu, and Veloce. Model and simulate systems using SystemC, C/C++, and TLM 2.0. Collaborate with design and verification teams to identify issues early in the development cycle. Support integration of hardware and software components for system-level validation. Contribute to test plan development, debug failures, and drive closure. Requirements: Bachelors or Masters degree in Computer Science, Computer Engineering, Electrical Engineering, or a related field. 48 years of experience in Emulation and Design Verification. Proficiency with emulation tools like Cadence Palladium, Synopsys Zebu, or Mentor Veloce. Hands-on experience with SystemC, C/C++, and UVM-SystemC. Strong understanding of SoC/ASIC design, hardware/software co-verification, and industry standards. Experience in modeling, simulation, and verification of embedded systems or complex hardware architectures. Excellent problem-solving, communication, and collaboration skills. Detail-oriented with a quality-first approach. Preferred Qualifications: Experience in pre-silicon validation of multi-core systems or hardware accelerators. Exposure to RTL design and FPGA prototyping is a plus.

Job Title: Emulation Engineer Location: Bangalore Experience: 3+ Years Notice Period: Immediate Joiners Preferred Industry: Semiconductors / VLSI / EDA Employment Type: Full Time, Permanent Job Description: We are looking for a highly motivated and skilled Emulation Engineer to join our SoC/Sub-System Pre-Silicon Verification team. The ideal candidate will have hands-on experience with Protium , Palladium , and other leading emulation/prototyping platforms. You will be responsible for enabling accelerated verification using Synthesizable BFMs and VIPs, supporting early software bring-up, and collaborating across cross-functional teams. Key Responsibilities: Develop and deploy Accelerated Verification IPs (VIPs) and Synthesizable Bus Functional Models (BFMs) . Integrate memory models and third-party VIPs in the Palladium and Protium environments. Engage with internal teams and EDA vendors to optimize pre-silicon emulation setup. Understand and support left-shift software validation methodologies. Optimize and debug critical paths in emulation platforms for performance improvements. Manage builds and regression environments for emulation flows. Required Skills: 4+ years of experience in emulation/prototyping platforms (preferably Protium , Palladium , Zebu , or Veloce ). Hands-on experience with Protium (must-have). Familiarity with JTAG , UART , and SpeedBridges (Ethernet/USB). Strong scripting skills in Shell , Python , or Perl . Proficiency in SystemVerilog , UVM , and Accelerated VIP integration. Working knowledge of standard interfaces: AMBA (AXI/APB/AHB), I2C, SPI, UART, Ethernet . Excellent analytical and debugging skills. Strong communication skills and ability to collaborate with global teams. Education: B.E./B.Tech or M.E./M.Tech in Electronics , Electrical , VLSI , or a related field. Keywords: Protium, Palladium, Emulation Engineer, BFMs, Accelerated VIPs, SystemVerilog, UVM, JTAG, UART, Veloce, Zebu, HAPS, Python, Perl, AMBA, AXI, SPI, I2C, Pre-silicon Validation, Semiconductor, SoC, RTL

We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: A Hardware-Assisted Verification Expert with deep knowledge of IP interfaces such as PCIe and DDR, and experience with Zebu, HAPS, and EP platforms. You have a proven track record in IP verification and methodology ownership focused on emulation and verification. You thrive in a matrixed, international, and team-oriented environment with multiple stakeholders. Your hands-on approach, collaborative mindset, and proactive attitude drive results. You are passionate about developing optimal solutions covering the entire ecosystem of Controller and PHY, with a focus on emulation and acceleration. What Youll Be Doing: * Bridging and closing gaps between the available or required Emulation IP feature set and the Design IP verification of all its functions, covering both the Controller and PHY. * Reporting metrics and driving improvements in Emulation IP. * Using your expertise to drive requirements for the Emulation IP and ensure its correct usage and deployment in verification strategies for both Controller and PHY. * Staying ahead of evolving standards, understanding future changes, specification errata, and driving this understanding into both the Emulation IP and Design IP teams. * Reviewing test plans in both Emulation IP and Design IP to ensure they deliver the required function, feature, and quality to be best in class. The Impact You Will Have: * Enhancing cross-functional collaboration to improve product quality and end customer satisfaction. * Changing the mindset in the way we use Emulation IP in validating digital designs and architectures. * Driving innovation in defining requirements for IP product development, in the context of Emulation. * Evolving and integrating best-in-class methodologies within the organization. * Standardizing and optimizing workflows to increase efficiency and compliance. What You’ll Need: * 10+ years of relevant experience. * Results-driven mindset. * Exposure on advanced protocols like PCIe and DDR interfaces. * Experience with Zebu in the context of technology and IP verification. * Proven track record in IP product development, specifically emulation. * Experience in cross-functional collaborations. * Excellent communication skills and a beacon for change. * Adaptability and comfort in a matrixed, international environment.

Emulation Engineer About the Role Key member of design Emulation team responsible for SOC or subsystem design pre silicon verification. The candidate will be responsible for creating/ modifying BFMs, tests in the Palladium and Protium environment to meet the left shift. Job Responsibilities: Develop and deploy Accelerated Verification IPs, Synthesizable BFMs and help in integration of memory models of various interfaces. Engaging with EDA vendors and ADI internal teams. Understand the SW left shift requirements and implement the Palladium/ Protium env. Understand the critical paths in Palladium/ protium for speed improvements Maintaining the builds Position Requirements: Bachelors/masters degree in electrical/Electronics/VLSI with 4+ years of experience on emulation (Protium mainly). Exposure to emulation platforms like Palladium/Zebu/Veloce and prototyping platforms like Protium/HAPS is highly preferred. Exposure to JTAG, UART and Speed Bridges (Ethernet/USB) validation is highly preferred Expertise in one or more of scripting languages (shell, python, Perl) is highly preferred Proficient in SV, UVM, integration of third party VIPS, Accelerated VIPS is required Experience in common communication protocols such as AMBA, I2C, SPI, UART and Ethernet is an added advantage Should be able to communicate technical details very effectively Good debugging and analytical skills

Responsibilities: Hands-on experience with ZeBu or Palladium emulators Strong RTL understanding (SV/UVM) and SoC knowledge Experience in pre-silicon validation and hardware/software co-emulation Familiarity with waveform, simulator, and debug tools

Lead, Develop and deploy best-in-class Emulation/FPGA prototyping tools and methodologies across ADI Product Lines Develop and deploy Accelerated Verification IPs, Synthesizable BFMs and help in integration of memory models of various interfaces Engaging with EDA vendors to influence their development roadmaps to meet ADI s requirements into the future Support the product lines in bring-up of new designs, debug issues and explore new methodologies that improve the overall verification flow Training, deployment, and support of verification methodologies within ADI Position Requirements : Bachelors/master s degree in electrical/Electronics/VLSI with 4-8 years of experience Exposure to emulation platforms like Palladium/Zebu/Veloce and prototyping platforms like Protium/HAPS is highly preferred. Exposure to JTAG, UART and SpeedBridges (Ethernet/USB) validation is highly preferred Expertised in one or more of scripting languages(shell,python,perl) is highly preferred Proficient in SV, UVM, integration of third party VIPS, Accelerated VIPS is required Experience with Vplan/Testplan development and development of verification environment from ground up is good Experience in common communication protocols such as AMBA,I2C, SPI,UART and Ethernet is an added advantage Should be able to communicate technical details very effectively with both customers (product line teams) and peers Good debugging and analytical skills

Lead, Develop and deploy best-in-class Emulation/FPGA prototyping methodologies and execution across ADI Product Lines Proficient in developing unit and SoC level test benches using UVM Skilled in many aspects of digital verification such as constrained random verification process, functional coverage, code coverage, assertion methodology etc Skilled in enabling emulation for Software development and validation Develop and deploy Accelerated Verification IPs, Synthesizable BFMs and help in integration of memory models of various interfaces Engaging with EDA vendors to influence their development roadmaps to meet ADI s requirements into the future Support the product lines in bring-up of new designs, debug issues and explore new methodologies that improve the overall verification flow Training, deployment, and support of verification methodologies within ADI Position Requirements : Bachelors/master s degree in electrical/Electronics/VLSI with 8-12 years of experience Exposure to emulation platforms like Palladium/Zebu/Veloce and prototyping platforms like Protium/HAPS is highly preferred. Experience in bringing up designs from scratch in Palladium/Protium is highly preferred Exposure to JTAG, UART and SpeedBridges (Ethernet/USB) validation is highly preferred Expertised in one or more of scripting languages(shell,python,perl) is highly preferred Expertised in SV, UVM, integration of third party VIPS, Accelerated VIPS is required Experience with Vplan/Testplan development and development of verification environment from ground up is required Experience in common communication protocols such as AMBA,I2C, SPI,UART is required and Protocols like JESD, Ethernet is good Should be able to communicate technical details very effectively with both customers (product line teams) and peers Good debugging and analytical skills

Emulation experience on any/all available platforms (Palladium, Protium, Veloce, or Zebu, EP) including design bringup, build flow, debug, performance and throughput tuning. Experience with Verilog, VHDL design Knowledge

Permanent Job Opportunity Pre & Post Silicon Validation Engineer | Bangalore:: Univision Technology Consulting Pvt. Ltd Position Details: Role: Permanent Position Company Name: Univision Technology Consulting Pvt. Ltd., Bangalore Website: https://univisiontechnocon.com Job Location: Bangalore About Us: UNIVISION enables technology through R&D, innovation, passion, and disruption in areas such as System Engineering, IoT, Automation, Cloud Computing, and Artificial Intelligence. We offer customer-centric and customized solutions across industry verticals including Semiconductors, Automotive, Cloud Computing, Consumer Electronics, and Automation Control Systems. Role: Pre & Post Silicon Validation Engineer Areas of Responsibility: Hands-on experience in complex silicon validation on emulation and pre & post-silicon platforms. In-depth knowledge of one or more peripheral protocols and specifications. Bare-metal/Linux driver and firmware development experience, with excellent C programming skills. Knowledge of any CPU architecture (ARM preferred). Platform/board-level debugging experience is an added advantage. Familiarity with lab equipment such as oscilloscopes, signal generators, protocol analyzers, and logic analyzers. Key Skills: Zebu, Palladium, FPGA, Ethernet, Flash IPs, PCIe SerDes, ARM Experience Required: 5 to 10 years Additional Skills and Experience: Testing and validating embedded systems functionality using virtual prototypes. Strong communication skills for effective collaboration with design teams and sharing validation insights. Basic test case development and execution for hardware/software integration in pre- and post-silicon phases. Debugging and troubleshooting hardware systems in a virtualized environment. Strong understanding of embedded systems, firmware development, and system-on-chip (SoC) architecture. Proficiency in programming languages such as C for testing and automation. Collaborating with cross-functional teams for co-validation and early firmware support. Troubleshooting using logs, simulations, and virtualization tools.