Silicon Design Verification Manager II, Camera ISP Google

4.0 - 10.0 years

0 Lacs

karnataka

On-site

As a successful candidate for this role, you should possess a Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or have equivalent practical experience. You should have at least 10 years of experience in Camera ISP image processing or other multimedia IPs like Display or Video Codec. Additionally, you should have a solid background with System Verilog Assertions (SVA), assertion-based verification, and formal verification, with at least 4 years of experience in people management and employee development. Preferred qualifications for this position include a Master's degree or PhD in Electrical Engineering, Computer Engineering, or Compute...

Posted 3 months ago

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Silicon Design Verification Manager II, Camera ISP Google

4.0 - 10.0 years

0 Lacs

karnataka

On-site

Posted 5 months ago

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2.0 - 6.0 years

0 Lacs

karnataka

On-site

Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 2 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog. Experience with logic synthesis techniques to optimize RTL code, performance and power, and low-power design techniques. Experience with a scripting language such as Perl or Python. Preferred qualifications: Master's degree or PhD in Electrical Engineering, Computer Science, or equivalent practical experience. Experience implementing image/video processing blocks or other multimedia IPs such as Display ...

Posted 5 months ago

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