Jobs

Interviews
Job Alerts
Tools

Upskill and Grow with AI

Mock Interview Practice interviews in realistic simulations

Coding Practice Improve your coding skills with challenges

Certification Earn certifications to validate your skills

AI Learning Get trained with AI expert sessions

Career Path AI insights for smarter career decisions

AI Job Match Score AI-Powered Job Match Against Your Resume and Optimize Your Resume

Career Tools and Resources

Resume Builder Build Professional Resume with Ease

ATS Friendliness Check Check Resume Friendliness for Applicant Tracking Systems

Auto Apply Apply to hundreds of jobs on any platform effortlessly

Co-Pilot (Chrome Extension) Your AI Assistant for Seamless Browsing Efficiency

Interview Questions Streamline interviews with ready-to-use questions

Salaries Discover market-driven salary insights across skillsets and geographies

Companies Explore leading companies actively hiring talent
For Employers

Jobs

Interviews

Home
>
Jobs in Bengaluru
>
Advanced Micro Devices, Inc
>
MTS Synthesis / STA Design Engineer

MTS Synthesis / STA Design Engineer

Advanced Micro Devices, Inc

8 - 13 years

25 - 35 Lacs

Bengaluru

Posted:1 month ago| Platform:

Apply

Skills Required

Graphics STA Linux SOC Perl System verilog Windows Firmware Ruby Physical design

Work Mode

Work from Office

Job Type

Full Time

Job Description

MTS SILICON DESIGN ENGINEER (Timing Constraints/STA Signoff )

THE ROLE:

The focus of this role is to plan, build, and execute the verification of new and existing features for AMD s graphics processor IP, resulting in no bugs in the final design.

THE ROLE:

As a member of the AECG ASIC Group, you will help bring to life cutting-edge designs. As a member of the Back-end design/integration team, you will work closely with the architecture, IP design, Physical Design teams, and product engineers to achieve first pass silicon success.

THE PERSON:

A successful candidate will work with silicon design engineer s . The candidate will be highly accurate and detail-oriented, possessing good communication and problem-solving skills.

KEY RESPONSIBLITIES:

Responsible for the development of complex multi-mode / multi-corner timing constraints that are compatible for RTL and signoff
Ensuring constraints quality (SDC) using industry tools like Fishtail , GCA
Well versed with timing signoff methodology and corner definitions
Drive the pre-route timing checks and QoR clean up to eliminate SDC issues and ensure a quality handoff for STA checks
Requires a mix of SDC knowledge, EDA timing tool competence and Tcl based scripting capability (in both EDA environment and standalone Linux Tcl shell scripts)
Responsible for Timing closure of one or multiple sub chip/subsystem OR Full chip.
Ensuring full chip level Interface timing closure along DRV closure
Generating timing ECO using tools DMSA/Tweaker and leading subsystem/Subchip/FC timing closure

PREFERRED EXPERIENCE:

8+ years of experience in building the timing constraints for IPs, blocks and Full-chip implementation in both flat/hierarchical flows.
Proficient in analyzing SoC architecture to derive appropriate timing constraints and define STA methodology.
Skilled in translating architectural and design specifications into accurate timing constraints (SDC), including clock definitions, generated clocks, exceptions (false paths, multi-cycle paths), and hierarchical timing.
Owned timing budgets, constraint development, and timing ECOs, achieving first-pass silicon success.
Experience with analyzing the timing reports and identifying both the design and constraints related issues.
Preferred EDA tool experience: Synopsys Design Compiler/Primetime, Spyglass, Fishtail, Tweaker etc.

Excellent communication and interpersonal skills and always enthusiastic to collaborate with diverse teams.

Experience in timing closure of high frequency blocks & subsystems (> Ghz range )
Experience in working full-chip STA closure, defining mode requirements and corners for timing closure.
Strong Understanding of DFT modes requirements for timing signoff
Good understanding of physical design flow and ECO implementation.
Strong understanding of SDC constraints, OCV,AOCV,POCV analysis.
Strong TCL/scripting knowledge is mandatory.

ACADEMIC CREDENTIALS:

Bachelors or Masters degree in computer engineering/Electrical Engineering

THE PERSON:

You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/ timezones . You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

KEY RESPONSIBILITIES:

Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified
Build test plan documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases
Estimate the time required to write the new feature tests and any required changes to the test environment
Build the directed and random verification tests
Debug test failures to determine the root cause; work with RTL and firmware engineers to resolve design defects and correct any test issues

Review functional and code coverage metrics modify or add tests or constrain random tests to meet the coverage requirements

PREFERRED EXPERIENCE:

Proficient in IP level ASIC verification
Proficient in debugging firmware and RTL code using simulation tools

Proficient in using UVM testbenches and working in Linux and Windows environment s
Experienced with Verilog, System Verilog, C, and C++
Graphics pipeline knowledge
Developing UVM based verification frameworks and testbenches, processes and flows
Automating workflows in a distributed compute environment .

Exposure to simulation profile, efficiency improvement, acceleration, HLS tools/process
Strong background in the C++ language, preferably on Linux with exposure to Windows platform
Good understanding and hands-on experience in the UVM concepts and SystemVerilog language
Good working knowledge of SystemC and TLM with some related experience .
Scripting language experience: Perl, Ruby, Makefile , shell preferred.

Exposure to leadership or mentorship is an asset
Desirable assets with prior exposure to video codec system or other multimedia solutions .

ACADEMIC CREDENTIALS:

Bachelors or Masters degree in computer engineering/Electrical Engineering

#LI-SR4

Benefits offered are described:

AMD benefits at a glance .

More Jobs at Advanced Micro Devices, Inc

PMTS Silicon Design Engineer

Bengaluru

Experience: Not specified

INR 15 - 20 Lacs

Sr. Commercial Sales Rep

Bengaluru

10 - 12 yrs

INR 7 - 11 Lacs

MTS Software Development Engineer

Bengaluru

10 - 15 yrs

INR 9 - 13 Lacs

SMTS Silicon Design Engineer

Bengaluru

12 - 15 yrs

INR 15 - 20 Lacs

Hardware Development Lead (High-Speed Digital Design / Board Design)

Hyderabad

12 - 15 yrs

INR 15 - 20 Lacs

Mock Interview

Practice Video Interview with JobPe AI

Start Job-Specific Interview

Start Your Job Search Today

Browse through a variety of job opportunities tailored to your skills and preferences. Filter by location, experience, salary, and more to find your perfect fit.

Job Application AI Bot

Apply to 20+ Portals in one click

Download Now

Download the Mobile App

Instantly access job listings, apply easily, and track applications.

Enhance Your Ruby Skills

Practice Ruby coding challenges to boost your skills

Start Practicing Ruby Now

Advanced Micro Devices, Inc

Semiconductors

Sunnyvale

Before You Leave... Find Your Perfect Job!

Login to

Please Verify Your Phone or Email

Confirm Action

Contact Us

Search

Profile

Upskill and Grow with AI

Personal Settings

MTS Synthesis / STA Design Engineer

Experience & Salary

Skills Required

Work Mode

Job Type

Job Description

MTS SILICON DESIGN ENGINEER (Timing Constraints/STA Signoff )

THE ROLE:

THE ROLE:

THE PERSON:

KEY RESPONSIBLITIES:

PREFERRED EXPERIENCE:

ACADEMIC CREDENTIALS:

THE PERSON:

KEY RESPONSIBILITIES:

PREFERRED EXPERIENCE:

ACADEMIC CREDENTIALS:

More Jobs at Advanced Micro Devices, Inc