Middleware Engineer – COM Stack

Job Description:

Build a high-performance, multi-transport communication stack (CAN/CAN-FD, LIN, Ethernet, TCP/IP) with a clean transport abstraction and PDU routing under real-time constraints. You will engineer throughput/latency/jitter outcomes, ensure determinism and back-pressure handling, and provide instrumentation and testability across SIL/HIL.

Key Responsibilities:

1. Design and implement the COM layer: PDU Router, signal packing/unpacking, and transport bindings for CAN/CAN-FD, LIN, and Ethernet.

2. Integrate and tune a lightweight TCP/IP stack (e.g., lwIP) with IPv4/IPv6, UDP/TCP; implement socket abstractions and connection lifecycle.

3. Engineer buffering strategies (ring buffers, memory pools), zero-copy paths where feasible, and QoS/back-pressure for deterministic behavior.

4. Instrument the stack with counters and timestamps; analyze traces using Wireshark and Vector CANoe/CANalyzer; troubleshoot loss, duplication, and head-of-line blocking.

5. Deliver measurable KPIs (throughput, one-way latency, jitter) under varying bus loads and failure scenarios (bus-off, link flap).

6. Implement robust error paths: timeouts, retransmissions, reconnection, bus-off recovery, and graceful degradation.

7. Develop unit/integration tests for SIL and HIL; add performance benches and golden datasets; integrate with GitLab CI.

8. Document APIs, routing tables, configuration knobs, and developer samples; support consumers (Diagnostics/Services).

9. Collaborate with Platform (HAL/RTD) on DMA/interrupt policies and with Diagnostics on DoIP/UDS data paths.

Required Skills & Experience:

1. 8 years in embedded networking/middleware with strong C; RTOS concurrency (ISRs, priorities) and lock-free/low-copy techniques.

2. Hands-on with Vector CANoe/CANalyzer and Wireshark; able to interpret PCAPs/logs.

3. Working knowledge of lwIP/embedded TCP/IP, socket APIs, fragmentation/MTU issues, and network timing.

4. Experience with DMA-driven I/O and ISR/thread handoffs; understanding of Ethernet MAC/PHY, VLAN, and link negotiation.

5. Exposure to AVTP (IEEE 1722) or TSN/AVB is a plus; familiarity with DoIP integration beneficial.

6. Comfort with lab work (probes, link impairment), performance tuning, and automated test harnesses.

7. Degree in ECE/EE/CS or equivalent experience; clear technical documentation habits.