Lead Memory Circuit Design Engineer

About Tessolve:

Tessolve is a leading semiconductor services company, offering design, test, validation, and related services to global customers. We work on SoC / IP development, advanced node challenges, and are keen on pushing the boundaries in memory / VLSI design

Job Title: Memory Design Engineer

Experience:

Memory Design Engineer

Key Responsibilities:

• Design and development of memory architectures such as

  SRAM, Register Files, ROM, CAM, DRAM

  , or

  eFlash

  .
• Transistor-level design and simulation of memory circuits to meet

  performance, power, and area (PPA)

  targets.
• Work closely with architecture, layout, and verification teams to ensure design quality and timely delivery.
• Develop and optimize sense amplifiers, precharge circuits, wordline drivers, bitline circuitry, decoders, and redundancy logic.
• Perform

  corner analysis

  ,

  variation analysis (Monte Carlo, process-voltage-temperature sweeps)

  , and

  IR drop analysis

  .
• Ownership of

  schematic design

  ,

  layout review

  , and

  sign-off simulations

  .
• Silicon validation support and debugging of any silicon issues.
• Write documentation and participate in peer reviews.

Required Skills:

• Strong experience in

  CMOS analog/digital circuit design

  .
• Proven hands-on experience in

  SRAM, ROM, CAM, or other embedded memory

  design.
• Proficient in tools like

  Cadence Virtuoso, Spectre, HSPICE, Calibre

  , etc.
• Solid understanding of

  device physics

  ,

  parasitics

  , and

  sub-micron technology nodes

  (e.g., 7nm, 5nm, etc.).
• Familiar with

  memory compilers

  ,

  EDA flows

  , and

  design automation scripting

  (TCL, Perl, Python).
• Exposure to

  Design For Test (DFT)

  and

  redundancy techniques

  in memory is a plus.
• Knowledge of

  EDA checks

  : LVS, DRC, ERC, and reliability sign-offs (EM, IR, etc.).
• Good understanding of

  layout techniques

  for high-performance and low-leakage memories.