94 Finfet Jobs

About The Role Project Role : Software Development Engineer Project Role Description : Analyze, design, code and test multiple components of application code across one or more clients. Perform maintenance, enhancements and/or development work. Must have skills : Static Timing Analysis (STA) Good to have skills : NA Minimum 12 year(s) of experience is required Educational Qualification : 15 years full time education Summary : Full Chip level Constraints development, validation, and timing closure Deep understanding of Finfet low technology node 7nm and below Expertise on IO budgeting, MMMC timing eco generation and convergence Expertise in Clock Tree analysis for deep submicron Hands-on expe...

General Summary: As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engine...

Analog / Custom Layout Design Engineer (TSMC 3nm | FinFET | Cadence | Calibre) Experience: 4 to 8 Years Location: Hyderabad Job Description: We are seeking a highly skilled Analog / Custom Layout Design Engineer to drive the design and development of critical analog, mixed-signal, and custom digital layouts , supporting full-chip level integration in advanced FinFET process technologies. You will be responsible for end-to-end layout execution from schematic translation and floor planning to verification and final sign-off — while collaborating closely with circuit designers, verification engineers, and project leads. Key Responsibilities: Design, develop, and implement analog, mixed-signal, ...

Educational Background • BE or MTech in Electronic/VLSI Engineering • 4 + year experience in analog/custom layout design in advanced CMOS process. NOTE: **custom layout or analog layout with TSMC 3nm/5nm7nm/16nm Finfet & 5+ exp **** TSMC 3nm Exp - MANDATORY. POINTERS TO BE CONSIDERED: 1. Candidate needs to be very clear about basic concepts. 2. He/She is expected to be really good at problem solving. 3. The candidate has to be able to challenge traditional way of doing layouts (Out of the box approach is needed). 4. Candidate needs to be able to work independently with minimal inputs. 5. Dedication, commitment and flexibility are very critical to achieve tight timelines without compromising

Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performanc...

Alternate Job Titles: Principal Memory Design Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content Join us to transform the future through continuous technological innovation, You Are: You are an accomplished and innovative engineer passionate about pushing the boundaries of embedded memory design With a strong foundation in electrical and electronics engineering, you thrive in dynamic environments where comple...

Alternate Job Titles: Principal Memory Design Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content Join us to transform the future through continuous technological innovation, You Are: You are an accomplished and innovative engineer passionate about pushing the boundaries of embedded memory design With a strong foundation in electrical and electronics engineering, you thrive in dynamic environments where comple...

FinFET Layout Engineer Job Description We are seeking a highly motivated and experienced FinFET Layout Engineer to join our team. In this role, you will be responsible for the physical layout and verification of complex integrated circuits using deep nanometer FinFET technology. You will work closely with circuit designers to ensure optimal performance, manufacturability, and reliability of our products. Key Responsibilities Perform physical layout of analog, digital, and mixed-signal circuits using Cadence tools. Work with deep nanometer FinFET technology nodes. Collaborate with circuit designers to optimize layout for performance and area. Perform Design Rule Checking (DRC) and Layout Vers...

i)Analog Layout Engineer Skills: who worked on Lower nodes 3nm, 5 nm, 7 nm, 10 nm Exp: 4-9yrs Loc: HYD ii) Skills: Non intel Exp Exp:6+yrs Loc: BLR iii)Skills: finfet nodes Exp:8+yrs Loc: BLR

General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements Minimum Qualifications: Bachelor's degree in Computer Sci...

General Summary: Posting Title: Analog/Mixed Signal PLL Analog Designers Bangalore (BDC), India Job Function Qualcomm Mixed-Signal IP team is actively seeking for analog circuit designers (3-10yrs) to join our growing team in Bangalore, India (BDC). You will be directly involved in delivering analog and mixed-signal integrated circuits for high-speed PLL/DLL/LDO IP for SoC and the integration into Qualcomm's Mobile, Auto, IoT & Compute SoC products in leading-nodes - finfets & beyond. Design goals include low-power & low voltage analog designs to address Qualcomm's low-power wireless products. Responsibilities Hands-on experience - Analog circuit design Architecture, design, and development ...

About The Role : To work independently on block/IP levels analog layout design from schematic. Estimating the Area, Optimizing Floorplan, Routing and Verifications. Good at LVS/DRC debugging skills and other verifications for lower technology nodes like 5,7,10, 14nm FinFet and below. Good understanding of Matching, EM, ESD, Latch-Up, Shielding, Parasitic and short channel concepts. Familiar with EDA tools like Cadence Virtuoso Editor & Calibre RVE Good interpersonal skills and critical thinking abilities to resolve the issue technically, and professionally. Key Responsibilities: Independently execute block/IP-level analog layout from schematics, including area estimation, floorplan optimizat...

Analog & Mixed Signal Layout Engineer High-Speed Analog Layout Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly skilled and motivated Analog & Mixed Signal (A&MS) Layout Engineer with over 6 years of experience in the development of high-speed analog and mixed-signal integrated circuits. You are passion...

We’re hiring Analog Layout Engineers (3–7 years) with hands-on experience in lower technology nodes, layout design, and DRC/LVS verification. Location: Hyderabad. Immediate joiners preferred.

: 6 to 8 years of Semiconductor industry experience in Custom Mixed-Signal layout design with a bachelors degree in electrical/Electronic Engineering. Able to deliver Custom analog layouts independently from schematic to layout generation, estimating the area, optimizing floorplan, routing, and complete verification flows. Firsthand experience in critical analog layout design blocks such as Temperature sensor, Serdes, PLL, ADC, DAC, LDO, Bandgap, Ref Generators, Charge Pump, Current Mirrors, Comparator, Differential Amplifier etc. Good at LVS/DRC debugging skills and other verifications for lower technology nodes - 14nm FinFet and below. Good understanding of Matching, EM, ESD, Latch-Up, Shi...

Title: Sr Engineer - Device Modeling About GlobalFoundries GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world's most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com. Introduction GlobalFoundries is seeking a motivated, self-driven engineer to be part of the Ultra-Low-Power CMOS modeling team in GlobalFoundries Bangalore. This team develops, among others, com...

Designation: Principal AMS Layout Leader (Global Product Solution Opportunity) Exp Range: 15-25 Yrs Location: Hyderabad Job Description A layout technical expert taking chip top ownership of analog-on-top ASIC developments. Hands-on technical contributor, able to take chiptop ownership including tape-out procedures. A teamplayer, able to collaborate within a global layout team and cross-discipline stakeholders. Required experience: 15+ years of experience Experience with nodes in the range of 22nm-40nm-180nm is a must. Experience with BCD technologies is a must. Proven track record of owning chip top layout. Must be able to independently go through required tape-out procedures and take corre...

Hiring Senior VLSI Engineer (10+ yrs) with strong experience in Low-Power Implementation, EMIR Analysis (Static/Dynamic), and SoC Physical Design using Redhawk/Voltus, ICC2/Innovus. Required Candidate profile Experienced SoC PD engineer skilled in EMIR, low-power design, PnR, STA, DRC/LVS, and sign-off. Strong in TCL/Perl scripting, tool automation, and FinFET node implementation.

Company Description Thalia is a venture-funded technology business with facilities in Cwmbran, United Kingdom; Hyderabad, India; and Cologne, Germany. The company provides analog and mixed signal design solutions for integrated circuit (IC) manufacturers and IP companies utilizing unique design automation technology and strong value-added services capabilities. With support from investors like Mercia Fund Management and Finance Wales, along with grants from Innovate UK and The Welsh Government, Thalia enables customers to migrate designs, generate portfolios, and develop faster IPs, achieving reduced design cycles, lower costs, and shorter time to market. Thalia has successfully delivered nu...

What we are looking for in you: 15 20 Years of experience in B2B Sales in Research and Consulting Companies Directly owned quota of USD 1.2M plus in new client acquisition A strong belief in a 10x growth mindset Passion to realize such growth for clients, MnM, and for your own self Proven track record of ensuring teams exceed quotas Excellent track record of building business run rate with high IQ / EQ Sales teams using a consultative approach Most critical, you are willing to roll up your sleeves to execute in a start-up culture with an intent to Play to Win

Have full ownership of IP, its major blocks or sub blocks Support marketing on presales activities technically Be the interface to the customer in technical interactions, feasibility analysis, design reviews, parameter estimations (like Power/Area etc.) Pair with similar domain experts across other geographical locations on core technical initiatives Define the architecture and uArchitecture of the IP's and its sub functions Understand and disseminate applicable standards and its relevance in a given project to the team Responsible to develop and design the high speed circuit blocks. Design, simulate and characterize high performance CMOS data communication circuits (drivers, receive equaliz...

As an Analog Layout Designer at UST, you will be responsible for independently working on block level and chip level Analog layout design while collaborating with circuit designers and project leads. Your role will require a minimum of 3+ years of hands-on experience in Analog layout, specifically focusing on custom layout design for DAC, ADC, Band gap, Regulators, LDOs, etc. Additionally, knowledge of finfet or exposure to technology at 28nm or below will be advantageous. You should possess a thorough understanding of IC fabrication and reliability issues and be well-versed in tools like Cadence-Virtuoso, PVS, ASSURA, and Calibre. Strong written and verbal communication skills are essential...

Role : Senior STA Engineer Experience Required : 4-5 YEARS Job Location: HYDERABAD Bachelors or Masters degree in Electrical/Electronics Engineering. Preferred Qualifications: Experience with full-chip STA closure. Exposure to low-power design techniques and multi-mode/multi-corner analysis. Knowledge of timing integration for third-party IPs. Required Skills: Strong understanding of STA fundamentals and timing closure methodologies. Proficiency in tools like PrimeTime, Tempus, Tweaker, Timevision, Fishtail. Experience with scripting languages (TCL, Perl, Python) for automation. Familiarity with advanced nodes (e.g., 7nm, 5nm, FinFET). Good grasp of physical design flow and constraints manag...

About Tessolve: Tessolve is a leading semiconductor services company, offering design, test, validation, and related services to global customers. We work on SoC / IP development, advanced node challenges, and are keen on pushing the boundaries in memory / VLSI design Job Title: Memory Design Engineer Experience: 4-10 years Location: Location: Bangalore Job Type: Full-Time Industry: Semiconductors / VLSI / EDA Education: B.E./B.Tech or M.E./M.Tech in Electronics, Electrical, or related field Job Description: We are looking for a skilled and experienced Memory Design Engineer to join our team. The ideal candidate will have a strong background in designing and developing high-performance and l...

Position: Analog Design Engineer Experience: 2 - 7 Years Location: Bangalore / Hyderabad Key Skills & Experience Required: Strong expertise in Power Management Circuits DC-DC Converters, LDOs, etc. Hands-on experience in High Voltage Power Management BCD, GaN-related process exposure. Proficiency in High-Speed SERDES Design or Sub-blocks (FinFET experience is a strong plus). Strong problem-solving skills and a passion for innovation in semiconductor design. If you are passionate about pushing the boundaries of semiconductor design, we would love to hear from you!