Posted:2 weeks ago| Platform:
On-site
Part Time
Job Requirements Engineer must possess strong understanding on IP & SoC Verification with 7+ Years of Design Verification Exp. Must possess string understanding on Verilog, SystemVerilog, C/C++. Must be able to debug the failure and able to narrow down the root cause.
Quest Global
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My Connections Quest Global
14.0 - 15.0 Lacs P.A.
Hyderābād
Salary: Not disclosed
Hyderābād
Salary: Not disclosed