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Lead Engineer - Analog Layout Design

Lead Engineer - Analog Layout Design

6 - 10 years

|

50 - 70 Lacs

Posted:2 days ago| Platform:

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Skills Required

analog layout design ams layout high speed analog layout serdes ic layout mask design vlsi engineering

Work Mode

Work from Office

Job Type

Full Time

Job Description

B.E./ B.Tech or M.E./ M.Tech in Electronics, Electrical, or VLSI Engineering.
Expertise in high performance analog layout in advance CMOS process nodes
Expertise in layouts of high performance and high speed analog blocks (ADC, DAC, PLL)
Expertise in high speed SERDES is mandatory
Expertise in analog layout techniques such as common centroid, interdigitation, shielding, dummy devices, EM aware routing on critical block, and must be versed with with VXL compliant methodology
Expertise in physical verification checks DRC, LVS, DFM, ERC, EM, IR etc.
Expertise in layout automation using SKILL / PERL / Python
VISA SPONSORED

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