FPGA- Verification & Validation

Detailed JD :

Experience: 7 to 14 yrs

Location: Bangalore

Notice period: immediate or a minimum 30 days Notice Period

• Bachelor's/Master's degree in Engineering (Electronics and Communication or VLSI)

• Minimum of 7+ years of relevant experience

• In-Depth Experience in Verification Planning, Execution, and Reviews
• Expert-level knowledge in VHDL, UVM/UVMF, System Verilog, Code coverage, assertions, etc.
• Proficiency in scripting, simulation tools (QuestaSim, VCS, Aldec), and coordination of complex verification projects
• Strong understanding of the DO-254 process.
• DO-254 audits and certification experience is a plus.
• Familiarity with tools like DOORS, Jama, Jira, or Polarion
• Experience with tool qualification and process documentation.
• Experience in PCIe, ARINC-429, MIL-1553, ARINC-818, SPI, AXI, ADC interfaces.
• Experience in MATLAB for algorithm development and Stimulus Generation.
• Exceptional problem-solving and debugging skills.