FPGA Engineer

As an FPGA Engineer specializing in Low-Latency Trading Systems at a high-frequency trading firm based in Delhi, you will play a crucial role in designing and implementing high-speed FPGA designs optimized for low latency and high throughput. Your responsibilities will include developing RTL modules for market data parsing, network packet processing, and order management, optimizing timing closure, pipelining, and clock domain crossing, and collaborating with software teams to build high-performance trading infrastructure. Key Responsibilities: - Architect and implement high-speed FPGA designs optimized for low latency and high throughput. - Develop RTL modules for market data parsing, network packet processing, and order management. - Optimize timing closure, pipelining, and clock domain crossing to push performance boundaries. - Collaborate with software teams to build full-stack, high-performance trading infrastructure. - Take designs from concept to deployment through simulation, synthesis, timing analysis, and testing. Qualifications Required: - B.Tech in ECE, EE, or CS from IITs, IIITs, BITS Pilani, or NITs. - Strong foundation in digital design, FPGA/ASIC fundamentals, and computer architecture. - Proficiency in Verilog or VHDL, with exposure to tools like Vivado, Quartus, or Synplify. - Experience with timing optimization, synthesis, and low-level hardware debugging. - Hands-on experience with Linux development environments; scripting (Python, Bash) is a plus. - Passion for performance optimization, hardware-software co-design, or real-time systems. Additional Details: You will have the opportunity to work with a tight-knit team of exceptional engineers from top backgrounds, building hardware at the bleeding edge of speed and performance. From day one, you will have ownership over your designs, which will go live and directly impact trading strategies. If you have exposure to high-speed interfaces like Ethernet, PCIe, or DMA, and an interest in financial markets or familiarity with exchange protocols, it would be a plus for this role. As an FPGA Engineer specializing in Low-Latency Trading Systems at a high-frequency trading firm based in Delhi, you will play a crucial role in designing and implementing high-speed FPGA designs optimized for low latency and high throughput. Your responsibilities will include developing RTL modules for market data parsing, network packet processing, and order management, optimizing timing closure, pipelining, and clock domain crossing, and collaborating with software teams to build high-performance trading infrastructure. Key Responsibilities: - Architect and implement high-speed FPGA designs optimized for low latency and high throughput. - Develop RTL modules for market data parsing, network packet processing, and order management. - Optimize timing closure, pipelining, and clock domain crossing to push performance boundaries. - Collaborate with software teams to build full-stack, high-performance trading infrastructure. - Take designs from concept to deployment through simulation, synthesis, timing analysis, and testing. Qualifications Required: - B.Tech in ECE, EE, or CS from IITs, IIITs, BITS Pilani, or NITs. - Strong foundation in digital design, FPGA/ASIC fundamentals, and computer architecture. - Proficiency in Verilog or VHDL, with exposure to tools like Vivado, Quartus, or Synplify. - Experience with timing optimization, synthesis, and low-level hardware debugging. - Hands-on experience with Linux development environments; scripting (Python, Bash) is a plus. - Passion for performance optimization, hardware-software co-design, or real-time systems. Additional Details: You will have the opportunity to work with a tight-knit team of exceptional engineers from top backgrounds, building hardware at the bleeding edge of speed and performance. From day one, you will have ownership over your designs, which will go live and directly impact trading strategies. If you have exposure to high-speed interfaces like Ethernet, PCIe, or DMA, and an interest in financial markets or familiarity with exchange protocols, it would be a plus for this role.