5 Synplify Jobs

Qualcomm India Private Limited is looking for an experienced Hardware Engineer to join their Engineering Group, specifically focusing on Hardware Engineering. As a member of this team, you will have the opportunity to work on designing IP and wireless sub-systems for cutting-edge next-generation Wireless PAN technologies such as Bluetooth, UWB, Thread, etc. Your primary responsibilities will include working with IP designers, Verification engineers, Validation engineers, Firmware engineers, and SoC engineers to validate Bluetooth and other PAN IPs on Qualcomm's proprietary and industry standard emulation platforms. The ideal candidate should have 8-12 years of hands-on experience in implementing designs on FPGA and a strong expertise in RTL coding using Verilog/SV. You should be proficient in all aspects of FPGA design including constraint definition, synthesis, floor planning, P&R, Timing closure, and bitfile generation. Additionally, you should have a strong command over FPGA EDA tools such as Synplify, Vivado, ISE, and Chipscope. Knowledge of the latest FPGA architectures, scripting languages, lab equipment, and interface protocols would be beneficial for this role. Minimum qualifications for this position include a Bachelor's or Master's Degree in Engineering in Electronics, VLSI, Communications, or a related field with 8 years of industry experience in Digital Design. Preferred qualifications include exposure to Bluetooth/BLE Technologies and scripting languages like Perl and/or Python. If you have a Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or a related field with 4+ years of Hardware Engineering experience, or a Master's degree with 3+ years of experience, or a PhD with 2+ years of experience, you are encouraged to apply. Qualcomm is an equal opportunity employer and is committed to providing reasonable accommodations for individuals with disabilities throughout the application/hiring process. If you have any questions or need more information about this role, please reach out to Qualcomm Careers.,

You are a senior FPGA expert with over a decade of experience in architecting, implementing, and optimizing complex digital systems. Your role will involve owning the design and delivery of mission-critical FPGA-based solutions. You will be responsible for the architecture, design, and implementation of complex FPGAs (Xilinx/Intel), as well as defining and driving system-level hardware architecture in collaboration with cross-functional teams. Additionally, you will lead timing closure, constraint management, and interface integration (PCIe, DDR, high-speed serial), while optimizing performance, power, and resource utilization. Your role will also include providing technical leadership, conducting peer reviews, and mentoring junior engineers. To be successful in this role, you should have 10+ years of hands-on FPGA design experience, deep expertise in Verilog/VHDL/SystemVerilog, and a strong track record of successful tape-outs/productization. Proficiency with tools such as Vivado, Quartus, Synplify, ModelSim, or similar is required. Familiarity with embedded systems, SoCs, or HW/SW integration is considered a plus. The ideal candidate is a self-starter who excels at solving challenging problems, shaping architecture, and delivering production-quality hardware. In this role, you will have the opportunity to work on innovative, performance-critical systems, while enjoying autonomy, ownership, and a voice in architecture decisions. If you are interested or know someone who fits this description, please apply by sending your details to himabindu.jeevarathnam@acldigital.com.,

Job Description: As a Technical Developer at Five Feed Learning Solutions Pvt. Ltd., you will be responsible for various aspects of FPGA and RTL design. You should possess good communication skills and analytical problem-solving capabilities. Your role will involve hands-on experience in FPGA/RTL Design using Verilog HDL, Tanner, Vivado ISE/Xilinx ISE, Modelsim, and Synplify Synopsys. A strong knowledge of VLSI Circuit designs and parameter synthesis is essential. Knowledge of TCAD, HSPICE, and PSPICE will be advantageous. Your responsibilities will include RTL design, verification, FPGA partitioning and implementation, as well as lab-based bring up of the SoC on FPGAs. Recent FPGA experience, including implementation, synthesis using Synplify, and timing closure with Vivado/ISE, is required. You should be able to architect, implement, and verify modules for FPGA interconnect. Proficiency in Verilog, Perl, and Make is expected. You should have expertise in both simulation-based verification and lab-based debug skills on FPGAs. Qualifications: - Graduation in B.E, B.Tech - Post Graduation in M.E., M.Tech VLSI Perks & Benefits: - Salary: Rs 2.5 Lacs - 4 Lacs p.a - Key Skills: Custom Coding, Technical Support, VLSI, Modelsim, Verilog, FPGAs, Perl, Synplify, Vivado/ISE, Xilinx ISE - Industry: Education / Training - Number of Positions: 2 Recruiter Profile: Recruiter Name: Not specified Email Address: hiringteam.3@fflspl.com Contact Company: Five Feed Learning Solutions Pvt. Ltd. Reference ID: FFLSPL/Feb-2025/189-92,

The culture at our organization is defined by the people who contribute to it. We foster a culture of passion for technology solutions that have a tangible impact on businesses. Additionally, we prioritize the pursuit of individual passions by our team members. Collaborating with us offers you the opportunity to gain a deep understanding of various industries and cutting-edge technologies. This knowledge enables us to develop forward-thinking and impactful solutions. Moreover, being a part of MarvyLogic can facilitate personal growth, leading you towards a more enriching and fulfilling life. To be considered for this role, you should possess the following qualifications: - A minimum of 10 years of experience in FPGA Design and Debug, preferably working with Xilinx Ultrascale+ and Virtex7 - Proficiency in utilizing tools such as Xilinx Vivado/Coregen/Synplify and developing/maintaining Timing/IO constraints (UCF) - Experience with managing multiple high-speed clock domains and integrating third-party IP onto Xilinx transceivers - Familiarity with working on FMC daughter-cards, High-Speed Cables/Connectors, etc. - Extensive debugging experience using Xilinx ILA, Protocol Analyzers, Oscilloscope, Logic Analyzers, etc. - Proficiency in PERL/TCL scripting and database management between FPGA and ASIC RTL - Knowledge of front-end RTL tools such as RTL Simulation, Synthesis, DFT, Timing - Ability to modify/adapt RTL designs for FPGA implementation and optimize designs to achieve FPGA area/performance goals - Collaboration with DV and Firmware/Software teams throughout the validation process, including post-silicon bring-up Your responsibilities in this role will include: - Effectively collaborating and communicating with multi-site teams - Reviewing FPGA netlist releases (block/chip) and overseeing ASIC product life cycle stages, including requirements, design, implementation, testing, and post-silicon validation If you meet the specified qualifications and are ready to take on these responsibilities, we welcome you to apply for this challenging and rewarding opportunity.,

Job Title: Lead FPGA Design Engineer Experience Required: 6+ years Location: Hyderabad/Bangalore Job Type: Full-time Industry: Semiconductor / Electronics / Embedded Systems Job Summary: We are looking for a highly skilled and experienced Lead FPGA Design Engineer to join our hardware design team. The ideal candidate will lead the design, implementation, verification, and validation of FPGA-based systems for complex hardware products. This role involves mentoring junior engineers, collaborating with cross-functional teams, and ensuring delivery of high-performance, high-reliability designs. Key Responsibilities: Lead architecture definition and design of complex FPGA solutions using VHDL/Verilog/SystemVerilog. Translate system-level requirements into FPGA design specifications. Hands-on implementation of FPGA designs using Xilinx, Intel (Altera), or Lattice FPGAs. Develop testbenches and perform simulation using tools like ModelSim, Questa, or VCS. Integrate and validate FPGA designs on hardware, working closely with board design and software teams. Use industry-standard tools such as Vivado, Quartus, Synplify, etc. Lead FPGA timing closure, floor planning, and resource optimization. Perform version control, documentation, and design reviews. Guide and mentor a team of junior engineers; ensure design best practices and quality processes are followed. Required Skills and Experience: Bachelor’s or Master’s degree in Electronics/Electrical/Computer Engineering. 6+ years of industry experience in FPGA design and verification. Expertise in VHDL/Verilog/SystemVerilog coding and simulation. Experience with FPGA toolchains such as Xilinx Vivado, Intel Quartus, Synplify. Strong knowledge of high-speed interfaces (e.g., PCIe, DDR, Ethernet, AXI). Familiar with embedded processor systems (MicroBlaze, Nios II, ARM SoCs). Proficiency in scripting (Tcl, Python, Shell) for automation. Experience with static timing analysis, constraints definition (SDC), and debugging. Good understanding of hardware/software integration. Excellent leadership, problem-solving, and communication skills. Preferred Qualifications: Prior experience in leading FPGA teams or projects. Exposure to safety-critical or mission-critical design environments (e.g., automotive, aerospace, medical). Experience with hardware emulation or ASIC prototyping on FPGAs. Familiarity with version control systems (Git, SVN) and documentation tools. Why Join Us? Work on cutting-edge FPGA designs in a collaborative environment. Competitive compensation with leadership opportunities. Growth-focused, innovation-driven engineering culture. Interested can share CV to sharmila.b@acldigital.com