Engineer Verification

1 - 3 years

17 - 18 Lacs

Posted:None| Platform: Naukri logo

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Work from Office

Job Type

Full Time

Job Description

  • Assist in the development of testbenches
  • Apply methods like UVM with System Verilog
  • Perform Verification of IP/SoC (SV/UVM)
  • Debug and optimize verification at IP/SoC

Your Profile
You are best equipped for this task if you have:
  • Should be strong in digital fundamentals. Should have sound knowledge in an HDL such as VHDL or Verilog.
  • Have good programming skills, e.g. in C,Python or Perl, as well as good Linux skills.
  • System Verilog knowledge is a plus. Knowledge on Ethernet (IEEE 802.3), MIPI protocols,Display Port is a plus
 

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