CPU Cores Performance Verification - Director

THE ROLE:

Director of x86 CPU Performance Verification

You ll work across architecture, design, functional verification, and software teams to bridge performance intent with silicon reality. If you thrive in fast-paced environments, love solving performance bottlenecks, and are passionate about building and mentoring high-impact teams this is the opportunity for you.

We are seeking a visionary and technically accomplished Director of CPU Cores Performance Verification to lead our efforts in verifying and optimizing performance for next generation x86 CPU cores. The ideal candidate will have deep expertise in CPU microarchitecture, performance modeling, and verification, with a strong background in performance infrastructure, emulation, and AI-driven methodologies.

THE PERSON:

You are a visionary leader with deep technical expertise in CPU microarchitecture and performance validation. You combine strong engineering fundamentals with the ability to scale teams and systems. You are comfortable navigating ambiguity, influencing stakeholders across domains, and delivering results under pressure. You lead with empathy, invest in people, and believe that high-performing teams are built on trust, feedback, and a shared sense of purpose.

KEY RESPONSIBILITIES:

• Team Leadership
• Lead and mentor a high-performing team of performance verification engineers.
• Foster a culture of innovation, technical rigor, and continuous improvement.
• Provide strategic direction across multiple concurrent verification programs.
• Program Leadership
• Define and execute the performance verification strategy for high-performance x86 CPU cores.
• Collaborate with architecture, u-arch, RTL, performance modeling, firmware, and software teams to define and validate performance KPIs.
• Ensure timely delivery of simulation/emulation results, and optimization feedback loops.
• Performance Analysis & Correlation
• Develop and execute performance verification plans targeting IPC, latency, throughput, and power efficiency.
• Validate and debug Performance Monitoring Counters (PMC) to ensure accurate performance visibility.
• Drive correlation between RTL and performance models, ensuring architectural intent is met.
• Analyze performance bottlenecks using simulation, emulation, and silicon data.
• Toolchain & Methodology
• Build and maintain scalable, modular performance verification infrastructure.
• Lead emulation-based performance setup and debug, enabling early performance validation.
• Integrate performance regression, profiling, and analysis flows using industry-standard and custom tools.
• Collaborate with compiler and OS teams to ensure software stack alignment with hardware performance goals.
• AI-Driven Infrastructure
• Drive the development of AI/ML-based infrastructure to automate performance analysis, anomaly detection, and efficiency improvements.
• Leverage data-driven techniques to optimize verification coverage and reduce debug cycles.
• Cross-Functional Collaboration
• Partner with x86 architecture, RTL design, physical design, and software teams to ensure performance targets are met.
• Influence design decisions through data-backed performance insights.
• Stakeholder Management
• Align verification goals with business and product roadmaps.
• Communicate performance status, risks, and trade-offs to executive leadership and stakeholders.
• Industry Awareness
• Stay current with trends in CPU architecture, performance modeling, and verification technologies.
• Evaluate and adopt emerging tools and techniques to maintain a competitive edge.

PREFERRED EXPERIENCE:

• 20+ years of industry experience with performance modeling and simulation tools (e.g., cycle-accurate simulators, emulators) with strong background in CPU microarchitecture, performance analysis, and system-level performance verification.
• Proven leadership in managing large, cross-functional engineering teams.
• Familiarity with PMC DV, latency and throughput validation, emulation platforms, and performance debug flows.
• Deep understanding of x86 ISA, microarchitecture, and performance metrics.
• Experience in developing performance test suites, performance triage tools, and simulation/emulation infrastructure.
• Expertise in performance analysis tools, correlation techniques, and workload optimization.
• Strong analytical and problem-solving skills with a data-driven mindset.
• Excellent communication and interpersonal skills.
• Deep knowledge of modern out-of-order CPU cores, memory subsystems, and performance modeling is a plus.
• Experience with ML/AI techniques/frameworks for performance triage, infrastructure automation and prediction is a plus.
• Exposure to high-performance computing (HPC), virtualization, or server-class CPUs.
• Background in hardware/software co-design and performance-aware compiler optimizations.
• Familiarity with pre-silicon and post-silicon debug methodologies.

ACADEMIC CREDENTIALS:

• Bachelors/Masters/Ph.D in electrical engineering, Computer Engineering, or related field.