ASIC SOC RTL Design Lead (Micro-architecture)

You are seeking an experienced ASIC SOC RTL Design Engineer/Lead to join the dynamic team at Eximietas Design in Bengaluru. As a key contributor, you will be pivotal in defining and implementing cutting-edge semiconductor designs, focusing on high-performance, power-efficient, and innovative solutions. Key Responsibilities: - Define and develop microarchitecture specifications for complex SoC designs. - Lead RTL design and implementation using Verilog/SystemVerilog, optimizing performance, power, and area (PPA). - Collaborate with cross-functional teams to ensure successful project execution. - Conduct design trade-off analysis to meet functional, performance, and power requirements. - Develop and implement design methodologies for improved efficiency and quality. - Mentor junior engineers, fostering innovation and excellence. - Participate in design reviews, provide technical leadership, and ensure project timelines are met. Qualifications: - 8+ years of hands-on experience in RTL design and microarchitecture development. - Proficient in RTL design using Verilog/SystemVerilog and logic synthesis. - Expertise in microarchitecture design for complex SoCs, including pipelining, caching, and memory subsystems. - Experience with low-power design techniques and familiarity with advanced process nodes. - Strong scripting skills in Tcl, Python, or Perl for automation and flow development. - Excellent problem-solving abilities, attention to detail, and communication skills. What We Offer: - Opportunity to work on cutting-edge semiconductor designs and innovative technologies. - Collaborative and inclusive work environment. - Competitive compensation and benefits package. - Professional growth and development opportunities. If you are interested in this exciting opportunity, please share your updated resume at maruthiprasad.e@eximietas.design.,