8 Logic Synthesis Jobs

As a Principal Product Engineer at Cadence, you will be a part of a team that is at the forefront of electronic design, leveraging over 30 years of computational software expertise to transform design concepts into reality. You will have the opportunity to work with the world's most innovative companies, contributing to the development of extraordinary electronic products across various dynamic market applications such as consumer electronics, hyperscale computing, 5G communications, automotive, aerospace, industrial, and health sectors. Cadence offers a stimulating work environment that fosters creativity, innovation, and impact. Our employee-friendly policies prioritize the physical and mental well-being of our workforce, support career development, provide continuous learning opportunities, and recognize and celebrate individual and collective successes. Our unique "One Cadence - One Team" culture emphasizes collaboration both within and across teams to ensure customer success. In this role, you will work with a diverse and passionate team of individuals who are dedicated to exceeding customer expectations and making a difference every day. Cadence provides numerous avenues for personal and professional growth, regardless of where you are in your career journey. To excel in this position, you should have a solid understanding of Hardware Description Languages (HDL) such as Verilog, System Verilog, and VHDL, along with experience in logic synthesis tools. Proficiency in timing concepts, SDCs, PPA push and analysis, 1801/UPF concepts, awareness of P&R flows, and power analysis and optimization would be advantageous. The ideal candidate should hold a BE/BTech/ME/MS/MTech degree or equivalent qualification. If you are looking to be part of a team that is committed to solving challenging problems and making a meaningful impact, Cadence is the place for you. Join us in our mission to tackle what others cannot.,

The ideal candidate for this position should have 2 to 6 years of experience. The location for this job is Noida with 1-2 openings available. The educational requirement is a BA or B.Sc. in a technical field, English, or Communications. An added advantage would be having at least 1-3 years of writing or customer support experience in the electronics, networking, or computer industry, with experience in the semiconductor industry being a plus. The ideal candidate would possess a background in Mass Communication, Physics, or English, along with prior experience in technical writing. Familiarity with semiconductor-related technical jargon, software debuggers, and EDA tool scripts would be beneficial. The ability to edit or create web pages is also considered an advantage. Responsibilities for this role include writing, editing, proofreading, and preparing product manuals per release schedules. This will involve interacting with development engineering and technical marketing personnel to translate conceptual models into coherent reference manuals and user guides. The candidate will also collaborate with engineers, customer support, and product management to ensure the readability, technical accuracy, and completeness of the product documentation. Additionally, participation in developing departmental authoring guides, tools, and process improvements is expected. Desired talents and skills include excellent verbal and written communication skills in English, attention to company documentation and quality assurance standards, the ability to understand and translate technical information into customer documents, and a working knowledge of programming languages, Verilog, formal verification, or logic synthesis. Proficiency in publication tools such as Frame Maker, MS Word, Visio, Eclipse/Web help, as well as familiarity with DITA, CMS, and wiki- or database-based authoring, is desirable. Excellent interpersonal skills and positive teamwork abilities are necessary for conducting interviews with various users and technical staff to gather data for documentation. The ideal candidate should be solution-oriented, self-motivated, and capable of managing schedules and priorities across multiple projects.,

As a Senior RTL Design Engineer with 3-5 years of experience, you will be based in Hyderabad. You will be required to demonstrate strong RTL (Verilog/System Verilog) skills with a focus on IP development. Your responsibilities will include verifying designs by creating simple testbenches, as well as possessing a solid foundation in logic synthesis and timing closure concepts. Additionally, you should have a good understanding of SoC architecture, AXI bus protocols, and hardware debug processes. Experience with Xilinx FPGAs, Vivado tool flows, and micro-architecture development will be considered a plus. If you meet the specified requirements and are interested in this opportunity, please submit your updated resume to janagaradha.n@acldigital.com.,

The company Eximietas Design is currently seeking an experienced and highly skilled RTL Micro Architect to join their team in Bangalore. As the RTL Micro Architect, you will be responsible for defining and implementing the microarchitecture of advanced semiconductor designs. Your role will involve working on challenging RTL design tasks, collaborating with various teams, and contributing to the development of high-performance and power-efficient solutions. Your key responsibilities will include defining microarchitecture specifications for complex SoC designs, leading RTL design and implementation using Verilog/SystemVerilog, collaborating with different teams to ensure project success, performing design trade-off analysis, developing design methodologies for efficiency improvement, mentoring junior engineers, participating in design reviews, and providing technical leadership. To qualify for this position, you should have at least 8 years of hands-on experience in RTL design and microarchitecture development, strong expertise in RTL design using Verilog/SystemVerilog and logic synthesis, proficiency in microarchitecture design for complex SoCs, experience with low-power design techniques, familiarity with advanced process nodes, strong scripting skills in Tcl, Python, or Perl, excellent problem-solving skills, and effective communication and leadership skills. In return, Eximietas Design offers you the opportunity to work on cutting-edge semiconductor designs and innovative technologies, a collaborative work environment, competitive compensation and benefits package, and professional growth and development opportunities. If you are interested in this position, please share your updated resume with maruthiprasad.e@eximietas.design.,

Eximietas Design is looking for an experienced and highly skilled RTL Micro Architect with over 8 years of experience to join the team. In this role, you will be instrumental in defining and implementing the microarchitecture of advanced semiconductor designs. Your responsibilities will include tackling complex RTL design challenges, collaborating with various teams, and contributing to the delivery of high-performance, power-efficient, and innovative solutions. As the RTL Micro Architect, your key responsibilities will involve defining and developing microarchitecture specifications for complex SoC designs, leading RTL design and implementation using Verilog/System Verilog, and collaborating with cross-functional teams to ensure successful project execution. You will also be expected to perform design trade-off analysis, develop design methodologies for efficiency improvement, mentor junior engineers, and participate in design reviews to provide technical leadership. To qualify for this role, you should have at least 5 years of hands-on experience in RTL design and microarchitecture development, strong expertise in using Verilog/System Verilog for RTL design, and proficiency in microarchitecture design for complex SoCs. Experience with low-power design techniques, familiarity with advanced process nodes, and scripting skills in Tcl, Python, or Perl will be advantageous. Additionally, strong problem-solving skills, attention to detail, communication, and leadership skills are essential for this position. In return, Eximietas Design offers you the opportunity to work on cutting-edge semiconductor designs and innovative technologies in a collaborative and inclusive work environment. You can expect a competitive compensation and benefits package along with professional growth and development opportunities. If you are interested in this exciting opportunity, please share your updated resume with us at maruthiprasad.e@eximietas.design. Join us in shaping the future of semiconductor designs!,

Collaborate with customers to ensure Synopsys SDC Constraints solutions meet expectations and use cases Develop and integrate design methodologies with broader Synopsys toolsets Track customer engagements, priorities, and communicate effectively with Marketing and Upper Management Prepare and deliver technical presentations and training to customers and Field Application Engineers (FAEs) Routinely gather customer feedback to influence internal product roadmap and R&D prioritization Provide technical direction to R&D and champion critical customer-driven enhancements The Impact You Will Have: Increase customer satisfaction through tailored SDC solutions Strengthen product integration and ecosystem value of Synopsys offerings Enable more efficient internal and external communication with clear tracking and reporting Empower customers and FAEs via expert training and detailed documentation Directly shape product development and innovation through real-world customer insights Drive continuous improvement of front-end design flows and SDC methodology What You'll Need: BS in Electrical or Computer Engineering with 10+ years of experience in STA, synthesis, or front-end flows Strong experience with STA and SDC constraint development Proficiency with RTL, System Verilog, and scripting languages (Perl, Tcl, Python) Prior experience with logic synthesis tools and front-end methodologies Experience with SDC tools and RTL simulation/SVA is a plus Excellent communication and documentation skills to represent technical and customer needs effectively

Physical design team is responsible for designing high performance microprocessor blocks for IBM Power and z mainframe servers. As a Hardware Developer at IBM, you'll get to work on the systems that are driving the quantum revolution and the AI era. Join an elite team of engineering professionals who enable IBM customers to make better decisions quicker on the most trusted hardware platform in today's market. Your role and responsibilities Perform Sub system level floor planning, placement, and routing for high-performance microprocessor design. Collaborate with cross-functional teams to achieve design goals. Close the design to meet timing, power, and area requirements. Implement engineering change orders (ECOs) to rectify functional bugs and timing issues. Ensure the quality and efficiency of the RTL to GDS2 implementation process. Required education Bachelor's Degree Preferred education Master's Degree Required technical and professional expertise 8+ years of industry experience Good knowledge and hands on experience in physical design , timing and methodology which include logic synthesis, placement, clock tree synthesis, routing , post route closure. Should be knowledgeable in physical verification ( LVS,DRC.. etc) ,Noise analysis, Power analysis and electro migration . Good knowledge and hands on experience in static timing analysis (closing timing at chip level) Good understanding of timing constraints . Should have experience in handling asynchronous timing, multiple corner timing closure. Preferred technical and professional experience Automation skills in PYTHON, PERL ,SKILL and/or TCL

Introduction Physical design team is responsible for designing high performance microprocessor blocks for IBM Power and z mainframe servers. Your role and responsibilities . Responsible for high performance microprocessor blocks RTL to GDSII implementation . Perform block level synthesis, floor-planning, placement and routing. . Close the design to meet timing, power budget and area. . Implement ECOs to address functional bugs and timing violations. . Team player, with good problem solving and communication skills. Required education Bachelors Degree Preferred education Masters Degree Required technical and professional expertise 5-8 years industry experience in physical design methodology. Good knowledge andhands on experience in physical design methodology which include logic synthesis,placement, clock tree synthesis, routing . Should be knowledgeable in physical verification ( LVS,DRC.. etc), Noise analysis, Power analysis and electro migration . Team player with good problem solving skills, communication skills and leadership skills. Preferred technical and professional experience Automation skills in PYTHON, PERL ,SKILL and/or TCL