Applications Engineering, Architect- STA

15 - 18 years

18.0 - 20.0 Lacs P.A.

Bengaluru

Posted:4 weeks ago| Platform: Naukri logo

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Skills Required

AutomationC++ASICSemiconductorSimulationCodingCircuit designingPackagingTechnical supportPython

Work Mode

Work from Office

Job Type

Full Time

Job Description

* Assisting internal stakeholders (marketing, sales team) with technical presentations and evaluating potential applications of Synopsys products to meet customer needs. * Collaborating with internal and external stakeholders on technology and solution development, validation, customer engagement, and deployment. * Providing technical assistance to customers, helping them solve their technical problems, and conducting tool training sessions. * Working closely with the PrimeTime R&D team to support the adoption and continuous usage of PrimeTime. * Engaging with field teams and customers on advanced technology engagements. * Driving innovation and success in chip design through continuous technological advancements. The Impact You Will Have: * Enhancing customer satisfaction by providing expert technical support and solutions. * Driving the successful adoption and usage of PrimeTime, contributing to its market leadership. * Collaborating with R&D and field teams to innovate and improve Synopsys products and solutions. * Facilitating customer engagement and ensuring their technological needs are met effectively. * Contributing to the development and validation of cutting-edge technologies and solutions. * Playing a pivotal role in driving the success of Synopsys chip design initiatives. What You ll Need: * BSEE/MS with minimum 15 years+ of relevant experience * Proficiency in static timing analysis (STA) and advanced STA methodologies. * Strong understanding of the full flow for chip design and EDA tools/flows. * In-depth knowledge of 3DIC stacking, packaging, and their impact on timing analysis and closure. * Experience with standard cells, MEM, IO IPs, and their library modeling and usage in flow. * Proficiency in STA constraints, ECO, and power optimization flow. * Hands-on experience with SPICE simulation and STA vs SPICE correlation. * Knowledge of advanced CMOS technologies and FinFET technology at 5nm/3nm/2nm and beyond. * Coding skills in TCL and Python; familiarity with C++ is a plus. * Familiarity with industry-stand ard ASIC tools such as PT, ICC, Redhawk, and Tempus. Who You Are: * Strong communicator and collaborator. * Technically adept and detail-oriente d. * Innovative thinker with a passion for technology. * Customer-focus ed with excellent problem-solvin g skills. * Team player who thrives in a dynamic environment.

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