Technical Lead (FPGA Developer) HyrEzy Talent Solutions LLP

5.0 - 9.0 years

0 Lacs

haryana

On-site

You should have experience working with USRP N310/X310 (N3xx/X3x0) and possess a deep understanding of FPGA Architecture. Additionally, you must be proficient in writing your own RTL custom HDL or integrating IP components, including VHDL, Verilog, System Verilog, Vivado HLS, Xilinx IP, and Vivado Block Diagram. It is essential that you have developed RFNoC Blocks and have a good grasp of the USRP Hardware Driver (UHD). Your responsibilities will include creating custom FPGA logic in RFNoC Blocks, utilizing existing RFNoC Blocks library, and understanding the GNU Radio interface to RFNoC Block. Furthermore, you will be involved in FPGA debugging, hardware/software integration, and implementi...

Posted 2 months ago

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FPGA Developer HIRINGHOUSE TECHNOLOGIES PVT LTD

6.0 - 10.0 years

0 Lacs

haryana

On-site

You should have a minimum of 6-8 years of total work experience with specific expertise in the following areas: - Experience working with USRP N310/X310 (N3xx/X3x0) - In-depth knowledge of FPGA Architecture - Proficiency in writing custom RTL HDL or integrating IP, including VHDL, Verilog, SystemVerilog, Vivado HLS, Xilinx IP, and Vivado Block Diagram - Development experience with RFNoC Blocks - Familiarity with USRP Hardware Driver (UHD) - Ability to write custom FPGA logic in RFNoC Blocks and utilize existing RFNoC Blocks library (e.g., FFT, FIR, Signal Generator, Fosphor) - Understanding of the GNU Radio interface to RFNoC Block - Skills in FPGA debugging and hardware/software integration...

Posted 2 months ago

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FPGA Developer Bonzer Business Solutions Pvt Ltd.

7.0 - 9.0 years

2 - 6 Lacs

New Delhi, Bengaluru

Work from Office

Skills required: 1. Should have worked on USRP N310/X310 (N3xx/X3x0) 2. In-depth Knowledge of FPGA Architecture 3. Able to write own RTL custom HDL or drops in IP a) VHDL, Verilog, System,Verilog, Vivado HLS b) Xilinx IP, Vivado Block Diagram 4. Should have developed RFNoC Block 5. Have working knowledge of USRP Hardware Driver (UHD) 6. Able to write custom FPGA logic in RFNoC Blocks 7. Able to use library of existing RFNoC Blocks a) FFT, FIR, Signal Generator, Fosphor 8. Have understanding of GNU Radio interface to RFNoC Block 9. FPGA debugging and HW/SW integration 10. Thorough understanding of appropriate coding styles for FPGAs, and trade-offs for density and speed 11. In-depth knowledge...

Posted 3 months ago

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