Sr Principal RTL Design Engineer Cadence Design Systems

12.0 - 16.0 years

0 Lacs

karnataka

On-site

You should have a minimum of 12 years of experience in ASIC design, with proficiency in Verilog coding, RTL design, and creating complex control path and data path designs. It is essential to have knowledge of interface Protocols such as UCIe, PCIe, USB, MIPI(DPHY), HDMI/Display, Ethernet, and SATA. Familiarity with RTL checks including LINT, SDC, CDC, synthesis flow, LEC, and timing constraints is required. Experience in writing Verilog testbench and conducting simulations will be beneficial. At Cadence, we are seeking individuals who are passionate about technology and innovation. Join us in making a significant impact on the world of technology. Let's work together to solve challenges tha...

Posted 2 weeks ago

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Physical Design Engineer, Staff Qualcomm

2.0 - 9.0 years

0 Lacs

hyderabad, telangana

On-site

Qualcomm India Private Limited is a leading technology innovator that pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to create a smarter, connected future for all. As a Hardware Engineer at Qualcomm, you will be responsible for planning, designing, optimizing, verifying, and testing electronic systems, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems to launch cutting-edge, world-class products. You will collaborate with cross-functional teams to develop solutions and meet performance requirements. You should have a Bachelor's degree in Computer Sc...

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Electrical Senior Principal Engineer Org_Subtype_BU022_Infrastructure_Solutions_Group

12.0 - 18.0 years

0 Lacs

karnataka

On-site

As an Electrical Senior Principal Engineer in our Electrical Engineering team in Bangalore, you will play a crucial role in the full hardware development lifecycle, from concept to production. Your expertise in system architecture definition, design, analysis, prototyping, sourcing, debugging, and validation of layouts will contribute to delivering state-of-the-art products that cater to the changing world's needs. Collaborating closely with designers, cross-functional teams within Dell Technologies, and suppliers, you will ensure that electronic designs meet various requirements, including schedule, feature set, functionality, quality, and industry standards. Join us in making a significant...

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DFX Engineer Eximietas Design

4.0 - 10.0 years

0 Lacs

andhra pradesh

On-site

You will be responsible for DFX Verification as a DFX Engineer at Eximietas. With 4-10 years of experience, you should have a good background in SoC RTL verification and debug, GLS simulations and debug, Verilog coding, and a solid understanding of JTAG and verification in Test Mode. It would be beneficial to have experience in pattern generation and Silicon debug. The role does not require MBIST/SCAN related experience. The location for this position is Visakhapatnam. If you meet the requirements and are interested in this opportunity, please share your updated resume with us at maruthiprasad.e@eximietas.design.,

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CPU Physical Design Sr Engineer, Lead Qualcomm

2.0 - 15.0 years

0 Lacs

hyderabad, telangana

On-site

Qualcomm India Private Limited is a leading technology innovator that strives to enable next-generation experiences and drive digital transformation for a smarter, connected future. As a Qualcomm Hardware Engineer, your responsibilities will include planning, designing, optimizing, verifying, and testing electronic systems. This involves working on circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment, packaging, test systems, FPGA, and/or DSP systems to develop cutting-edge products. Collaboration with cross-functional teams is essential to meet performance requirements and develop innovative solutions. To qualify for this position, you should hold a Bachelor's degree i...

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RTL ASIC Front end Design Engineer/ Lead Tessolve

5.0 - 9.0 years

0 Lacs

karnataka

On-site

You will be responsible for RTL ASIC front end design with Microarchitecture and Verilog coding. Your tasks will include MAS development, RTL coding, development of modules, and feature additions. You should have experience in working with medium complexity protocols and be well-versed in slow-speed protocols like I2C, SPI, and UART. Familiarity with AMBA bus protocols (APB, AHB, AXI) is required. Additionally, you should have experience in Quality check flows, including lint and CDC. For candidates with 8+ years of experience, you are expected to be very strong in RTL coding. Your role will involve microarchitecture development, owning and delivering a subsystem or top level in a SoC projec...

Posted 2 months ago

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R&D Engineer, Senior Synopsys

3.0 - 7.0 years

3 - 7 Lacs

Bhubaneswar, Odisha, India

On-site

As a new, exciting, and challenging position, we are looking for a talented person that can show a great level of initiative and ability to work in a busy and fast-changing environment. This rewarding role is fundamental to the successful and smooth operation of the engineering teams. You will play a vital role in helping to strengthen and develop forecasting capabilities, based upon improved monitoring capacity andforward-looking project schedules. You will generate test benches and test cases, perform RTL and gate-level SDF-annotated simulations and debug, and may perform mixed-signal (digital + analog) simulations and debug. You will interact with our application engineers and provide gui...

Posted 3 months ago

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