Job overview and responsibility - Design and develop services which can handle a massive amount of data - Design good database considering functional and non-functional requirements - Write clean and maintainable code - Improve code by continuous refactoring - Monitor application performance and fix system failures - Train junior/middle members Required skills and experiences - 8+ years for Web development (3 years for static typing languages) - More than 4 years of experience in Golang - Fluent English communication - Good understanding of SOLID principles, common design patterns and best practices - Solid experience with MySQL or PostgreSQL including performance tuning and optimization - Experience with complicated system architecture which includes API linkage with external systems - Experience with application performance monitoring and optimization - Experience with automation testing, E2E testing - Extensive knowledge of web security - Familiarity with CI/CD, Docker - Strong sense of ownership Preferred skills and experiences - Experience to develop BtoB applications Why Candidate should apply this position Caring Mental & Physical Recreation: - Hybrid working: 2 days at the office and 3 days WFH - Working hour: Flexible start 8AM-9AM from Mon-Fri - Full salary in probation - Insurance: Applied from Probation period: - Social Insurance, Health Insurance, Unemployment Insurance (on 100% salary) - Private health insurance & accident insurance. From Managing level: extra for family members - Bonus: 13th month salary - 16 - 24 paid days off and more - Paternity leave: Extra 5 days - Annual company trip; Quarterly team building - Billiards & Running club - Annual health check - Well-equipped facility: Macbook pro, additional monitor,.. Caring Career & Development: - Clear Career path - Foreign language & International technology-related certifications sponsoring - External & internal training courses - Soft-skill workshops - Tech seminars - Monthly and biannual Recognition Awards - Performance & salary review: twice/year (Jun & Dec) Report to Engineering Director Interview process 3 rounds in English: Technical interview (90 mins online)-> Problem solving, motivation (60 minutes offline) > Culture fit (45 mins online)
Job overview and responsibility 1. We are looking for a Memory Design Engineer to contribute to a highly innovative team by designing and developing high quality SRAM and ROM. You will work with other team members on the new process design challenges. You will have the chance to create novel low power and high-performance circuits and develop in-house design and verification flows for SRAM and ROM design in the context of ISO26262. MAJOR RESPONSIBILITIES As a part of SRAM/ROM Design team, you would be working on: 1. Architecture definition and schematic design of RAM and ROM compilers to get the most optimal circuit in terms of power and performance. 2. Verification of leafcells/circuit blocks including analysis of circuit behavior, timing marginalities, correct description of timing characterization intent on both pre and post layout netlist across the entire PVT space and compiler cut space. 3. Implement memory characterization flows based on NLDM/NLPM and CCS characterization 4. Mitigate risks through proactive design analysis 5. Generate front-end views (LIB) for memory IP integration in System-on-Chip. 6. Documentation and design review organization for compliant development in the context of ISO26262 7. Development QA flow for design verification 8. Any other assignment and role deemed appropriated might be assigned to you from time to time Required skills and experiences a) Qualification: Master or higher in Electronics Engineering. b) Minimum 5 years of working experience in memory design and memory characterization. Exposure to complete design cycle of memory development c) Skills/Competencies: Behavioral Competencies d) Good communication skills – good level in English, written and spoken. e) Teamwork and collaboration skills, working within multi-national, multi-site team f) Open, curious in new design implementation, integrity and friendly when engaging internal/external customers. g) Self-motivated, progressive attitude, and able to work independently with minimum supervision h) Excellent writing and reporting skills with strong communication and analytical skills Technical/ Functional Competencies j) Experience in using EDA tools for schematic entry and advanced transistor level simulators. Proven experience on transistor-level circuit design and circuit behavior analysis k) Solid understanding of device physics and process l) Knowledge of industry standard circuit simulation and design tools m) Deep background of the design, verification, and characterization of memory n) Solid understanding on generating performance/power/margin data of memory, validation of data and QA process o) Hands-on experience running SPICE simulation, and capability to adapt to new simulation tools p) Experience in Programming language, such as, Perl, Python, Tcl, and automation methods/algorithms is an advantage q) In-depth understanding of circuit fundamentals with a good exposure to digital and analog circuit design is a must. Strong experience to Memory design and characterization and associated EDA tools (Schematic editor, Spice Simulators, Characterization Infrastructure etc.). Preferred skills and experiences i) Able to learn quickly, self-driven and results-oriented Why Candidate should apply this position You will be part to the team developing state-of-the-art digital libraries allowing best-PPA digital design mainly dedicated for automotive market. - Children international education fee by employer - Career development and training - Work-life balance - International secondment program - Pension provisions - Bonus schemes - Health and prevention programs - Cafeteria and meal subsidy - Free parking - Hybrid working (1 day WFH per week) Report to Global Manager based in France Interview process 2 interviews with Hiring Manager
Job overview and responsibility 1. We are looking for a Memory Design Engineer to contribute to a highly innovative team by designing and developing high quality SRAM and ROM. You will work with other team members on the new process design challenges. You will have the chance to create novel low power and high-performance circuits and develop in-house design and verification flows for SRAM and ROM design in the context of ISO26262. MAJOR RESPONSIBILITIES As a part of SRAM/ROM Design team, you would be working on: 1. Architecture definition and schematic design of RAM and ROM compilers to get the most optimal circuit in terms of power and performance. 2. Verification of leafcells/circuit blocks including analysis of circuit behavior, timing marginalities, correct description of timing characterization intent on both pre and post layout netlist across the entire PVT space and compiler cut space. 3. Implement memory characterization flows based on NLDM/NLPM and CCS characterization 4. Mitigate risks through proactive design analysis 5. Generate front-end views (LIB) for memory IP integration in System-on-Chip. 6. Documentation and design review organization for compliant development in the context of ISO26262 7. Development QA flow for design verification 8. Any other assignment and role deemed appropriated might be assigned to you from time to time Required skills and experiences a) Qualification: Master or higher in Electronics Engineering. b) Minimum 5 years of working experience in memory design and memory characterization. Exposure to complete design cycle of memory development c) Skills/Competencies: Behavioral Competencies d) Good communication skills – good level in English, written and spoken. e) Teamwork and collaboration skills, working within multi-national, multi-site team f) Open, curious in new design implementation, integrity and friendly when engaging internal/external customers. g) Self-motivated, progressive attitude, and able to work independently with minimum supervision h) Excellent writing and reporting skills with strong communication and analytical skills Technical/ Functional Competencies j) Experience in using EDA tools for schematic entry and advanced transistor level simulators. Proven experience on transistor-level circuit design and circuit behavior analysis k) Solid understanding of device physics and process l) Knowledge of industry standard circuit simulation and design tools m) Deep background of the design, verification, and characterization of memory n) Solid understanding on generating performance/power/margin data of memory, validation of data and QA process o) Hands-on experience running SPICE simulation, and capability to adapt to new simulation tools p) Experience in Programming language, such as, Perl, Python, Tcl, and automation methods/algorithms is an advantage q) In-depth understanding of circuit fundamentals with a good exposure to digital and analog circuit design is a must. Strong experience to Memory design and characterization and associated EDA tools (Schematic editor, Spice Simulators, Characterization Infrastructure etc.). Preferred skills and experiences i) Able to learn quickly, self-driven and results-oriented Why Candidate should apply this position You will be part to the team developing state-of-the-art digital libraries allowing best-PPA digital design mainly dedicated for automotive market. - Children international education fee by employer - Career development and training - Work-life balance - International secondment program - Pension provisions - Bonus schemes - Health and prevention programs - Cafeteria and meal subsidy - Free parking - Hybrid working (1 day WFH per week) Report to Global Manager based in France Interview process 2 interviews with Hiring Manager
Job overview and responsibility 1. We are looking for a Memory Design Engineer to contribute to a highly innovative team by designing and developing high quality SRAM and ROM. You will work with other team members on the new process design challenges. You will have the chance to create novel low power and high-performance circuits and develop in-house design and verification flows for SRAM and ROM design in the context of ISO26262. MAJOR RESPONSIBILITIES As a part of SRAM/ROM Design team, you would be working on: 1. Architecture definition and schematic design of RAM and ROM compilers to get the most optimal circuit in terms of power and performance. 2. Verification of leafcells/circuit blocks including analysis of circuit behavior, timing marginalities, correct description of timing characterization intent on both pre and post layout netlist across the entire PVT space and compiler cut space. 3. Implement memory characterization flows based on NLDM/NLPM and CCS characterization 4. Mitigate risks through proactive design analysis 5. Generate front-end views (LIB) for memory IP integration in System-on-Chip. 6. Documentation and design review organization for compliant development in the context of ISO26262 7. Development QA flow for design verification 8. Any other assignment and role deemed appropriated might be assigned to you from time to time Required skills and experiences a) Qualification: Master or higher in Electronics Engineering. b) Minimum 5 years of working experience in memory design and memory characterization. Exposure to complete design cycle of memory development c) Skills/Competencies: Behavioral Competencies d) Good communication skills good level in English, written and spoken. e) Teamwork and collaboration skills, working within multi-national, multi-site team f) Open, curious in new design implementation, integrity and friendly when engaging internal/external customers. g) Self-motivated, progressive attitude, and able to work independently with minimum supervision h) Excellent writing and reporting skills with strong communication and analytical skills Technical/ Functional Competencies j) Experience in using EDA tools for schematic entry and advanced transistor level simulators. Proven experience on transistor-level circuit design and circuit behavior analysis k) Solid understanding of device physics and process l) Knowledge of industry standard circuit simulation and design tools m) Deep background of the design, verification, and characterization of memory n) Solid understanding on generating performance/power/margin data of memory, validation of data and QA process o) Hands-on experience running SPICE simulation, and capability to adapt to new simulation tools p) Experience in Programming language, such as, Perl, Python, Tcl, and automation methods/algorithms is an advantage q) In-depth understanding of circuit fundamentals with a good exposure to digital and analog circuit design is a must. Strong experience to Memory design and characterization and associated EDA tools (Schematic editor, Spice Simulators, Characterization Infrastructure etc.). Preferred skills and experiences i) Able to learn quickly, self-driven and results-oriented Why Candidate should apply this position You will be part to the team developing state-of-the-art digital libraries allowing best-PPA digital design mainly dedicated for automotive market. - Children international education fee by employer - Career development and training - Work-life balance - International secondment program - Pension provisions - Bonus schemes - Health and prevention programs - Cafeteria and meal subsidy - Free parking - Hybrid working (1 day WFH per week) Report to Global Manager based in France Interview process 2 interviews with Hiring Manager
Job overview and responsibility - Design and maintain end‑to‑end data pipelines to ingest, clean, augment, and version large‑scale molecular and phenotypic datasets. - Automate high‑throughput docking simulations; extract, featurize, and curate docking poses and affinity scores for downstream modeling. - Research, prototype, and productionize graph neural network and transformer‑based models for molecular property prediction, lead optimization, and virtual screening. - Develop and integrate semi‑supervised learning and active‑learning workflows to maximize insight from limited experimental labels. - Establish evaluation frameworks and benchmarks; analyze performance metrics (e.g., ROC‑AUC, enrichment factors) and iterate on model architectures to improve accuracy and robustness. - Collaborate closely with chemists, biologists, and software engineers to integrate ML solutions into NYB’s discovery platform, ensuring reproducibility, scalability (distributed/GPU training), and maintainable codebases. - Communicate results and methodologies in team meetings, internal reports, and through external publications or conference presentations. Required skills and experiences - Education & Research: • PhD or equivalent postdoctoral experience in Computer Science, Computational Biology, Bioinformatics, or a related discipline, with a strong publication record. - Technical Expertise: • At least 5+ Years of Experience in AI/ML • Proficient in Python and ML frameworks (PyTorch, TensorFlow, or JAX); experience with graph libraries (DGL or PyG) and transformer toolkits (Hugging Face). • Hands‑on with RDKit (cheminformatics) and molecular docking software (e.g., AutoDock Vina, Glide). • Familiarity with semi‑supervised techniques (consistency regularization, pseudo‑labeling) and self‑attention architectures. - Infrastructure & Scale: Experience with cloud platforms (AWS/GCP), containerization (Docker/Kubernetes), and distributed training across multi‑GPU clusters. - Analytical Foundations: Strong background in statistics, optimization, and experimental design; ability to translate biological questions into ML problems. - Collaboration & Communication: Excellent written and verbal skills; proven ability to work cross‑functionally in fast‑paced environments. Preferred skills and experiences - Contributions to open source ML tools; experience in generative molecular modeling; leadership or mentoring of junior researchers. - Experience working with genomics or omics projects/data (e.g., RNA-seq, WGS, single-cell), including familiarity with common genomics tools and libraries (Bioconductor, scikit-allel, or similar). Why Candidate should apply this position - Competitive salary - Workplace: This role is based in our Hanoi office, located in the vibrant Old Quarter. - Build a professional network through collaborations with pharmaceutical companies, industry leaders, and academic experts. - Work on impactful projects that address critical challenges in drug discovery and healthcare. - We provide a dynamic, fast-paced, and collaborative environment where problem-solving and agility are at the heart of what we do. Along with a competitive salary, we foster a culture that values ambition, confidence, and humility, consistently pushing the boundaries of innovation. If you're excited about working in a young, talented tech company and want to explore the world of AI and pharmaceuticals, we encourage you to apply. Report to CTO (in VietNam) and Professors, Experts (in Singapore)