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Silicon Design Verification Engineer, Coherency

Google

4.0 - 6.0 years

Bengaluru, Karnataka, India

On-site

Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 4 year of experience with SystemVerilog/Universal Verification Methodology (UVM) and coherency concepts. Preferred qualifications: Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science. Experience using formal techniques (e.g., JasperGold or Verification Compiler (VC) Formal) for verifying cache state transitions, credit management, and deadlock scenarios. Experience in defining and closing functional coverage for multi-agent coherency scenarios. Experience with correlating pre-silicon coheren...

Posted 4 weeks ago

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