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5.0 - 9.0 years
0 Lacs
noida, uttar pradesh
On-site
Role Overview: You will be responsible for implementing Design for Test (DFT) techniques to ensure the quality and reliability of semiconductor products. Your primary focus will be on areas such as JTAG, ATPG, logic diagnosis, Scan compression, and MBIST/LBIST. Additionally, you will be involved in Tessent based ATPG flow, GLS, and Post-silicon-debug. Your expertise in Perl/Tcl/Python scripting will be crucial for this role. Key Responsibilities: - Utilize your strong fundamental knowledge of DFT techniques to perform Core and SOC level ATPG, ensuring Automotive grade quality. - Engage in hierarchical ATPG retargeting and Pattern release for application on ATE. - Conduct SOC and Core level T...
Posted 1 month ago
5.0 - 9.0 years
0 Lacs
noida, uttar pradesh
On-site
You will be working as a DFT Engineer in Noida with the following responsibilities: Strong fundamental knowledge of DFT techniques including JTAG, ATPG, yield learning, logic diagnosis, Scan compression, IJTAG, and MBIST/LBIST. Experience in Tessent based ATPG flow, GLS, and Post-silicon-debug. Proficient in Perl/Tcl/Python scripting for automation and efficiency. Demonstrate excellent analytical and problem-solving skills. Conduct Core and SOC level ATPG to ensure Automotive grade quality. Handle Hierarchical ATPG retargeting and Pattern release for application on ATE. Execute SOC and Core level Timing/Non-timing GLS. Support silicon bring-up, diagnosis, and physical failure analysis. Facil...
Posted 3 months ago
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