Category Engineering Hire Type Employee Job ID 10641 Remote Eligible No Date Posted 17/04/2025 The candidate will be part of the R&D in Solutions Group in India. The position offers learning and growth opportunities. This is a Technical Individual Contributor role and offers challenges to work in a multi-site environment on technically challenging IP Cores in a role that will include IP Design Verification using UVM based environment methodology. Job Description: The candidate will be part of the Synopsys CXL IP Design verification R&D team at Synopsys. You will own UVM based verification environment, which handles multiple features of IP, test plan creation, test case writing, random constraint creation, coverage closure, SVA and Release. As part of the work, you will closely work with lead and be part of a global team of experienced Engineers. Technical Expertise Needed: BS or MS degree in Computer Science, Electrical or Electronics Engineering, or Related Field with 8+ years of experience in the following areas: Own UVM based testbench environment and developed UVM testbench architecture, Testplan and SVA for an IP/SoC. Knowledge of one or more of protocols/standards: PCIe, CXL, UCIe, AMBA (AXI,APB,AHB) etc Good knowledge of System Verilog. Hands-on experience with coverage closure and writing SVA for IP/SOC. Good simulation debugging skills. Experience with Perforce or similar revision control environment. Experience with Python/TCL or any scripting knowledge is an added advantage. Job Responsibilities include - Understand Standard Specifications, create testplan for the product and create UVM based testbench architecture. Propose and enhance the UVM architecture with unique idea for verification. Be single point of contact with hands-on experience on all verification tasks – Testbench Creation – Testplan creation – Coverage closure – SVA – Release Perform peer review of testbench code for continuous quality. Own simulation debugs using DVE/Verdi, interact with Design Team and aid in debug and Verification closure. Periodically publish technical papers and/or file patents on the feature updates/innovation carried out. The candidate will work in a project and team-oriented environment with teams spread across multiple sites, worldwide. In addition, the candidate should have excellent oratory and written communication skills in English, should be a team player and possess good problem-solving skills and show high levels of initiative. This position requires prior industry experience and is not open for college fresh grads. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 7322 Remote Eligible No Date Posted 10/11/2024 Emulation Expert – Zebu - ASIC Digital Design We Are: At Synopsys, we drive innovations that shape how we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. As a leader in chip design, verification, and IP integration, we empower the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: An Emulation Expert with deep knowledge of IP interfaces such as PCIe and DDR, and experience with Zebu. You have a proven track record in IP product development focused on emulation and verification. You thrive in a matrixed, international, and team-oriented environment with multiple stakeholders. Your hands-on approach, collaborative mindset, and proactive attitude drive results. You are passionate about right-first-time development, ensuring traceability of all verification requirements and covering the entire ecosystem of Controller and PHY. What You’ll Be Doing: Bridging and closing gaps between the available or required Emulation IP feature set and the Design IP verification of all its functions, covering both the Controller and PHY. Reporting metrics and driving improvements in Emulation IP. Using your expertise to drive requirements for the Emulation IP and ensure its correct usage and deployment in verification strategies for both Controller and PHY. Staying ahead of evolving standards, understanding future changes, ECNs, and specification errata, and driving this understanding into both the Emulation IP and Design IP teams. Reviewing test plans in both Emulation IP and Design IP to ensure they deliver the required function, feature, and quality to be best in class. The Impact You Will Have: Enhancing cross-functional collaboration to improve product quality and end customer satisfaction. Changing the mindset in the way we use Emulation IP in validating digital designs and architectures. Driving innovation in defining requirements for IP product development, in the context of Emulation. Evolving and integrating best-in-class methodologies within the organization. Standardizing and optimizing workflows to increase efficiency and compliance. What You’ll Need: 8+ years of relevant experience. Results-driven mindset. Subject Matter Expert in PCIe and DDR interfaces. Experience with Zebu in the context of technology and IP verification. Proven track record in IP product development, specifically emulation. Experience in cross-functional collaborations. Excellent communication skills and a beacon for change. Adaptability and comfort in a matrixed, international environment. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 10557 Remote Eligible No Date Posted 13/04/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate and skilled Analog Layout Design Engineer with a keen eye for detail and a deep understanding of advanced semiconductor technologies. You thrive in dynamic environments and possess a strong problem-solving aptitude. With a profound expertise in developing high-quality layouts and physical verification techniques, you are ready to contribute to cutting-edge DDR/HBM/UCIe IP development. You excel in collaboration, fostering accountability and ownership within teams, and have excellent written, verbal communication, and interpersonal skills. Your commitment to diversity and inclusion aligns with Synopsys’ values, and you are eager to work in an environment that welcomes all perspectives. What You’ll Be Doing: Hands-on development of layout for next-generation DDR/HBM/UCIe IPs. Solving complex problems and debugging issues effectively. Executing layout floor planning, routing, and physical verifications to meet stringent quality requirements. Ensuring compliance with DRC, LVS, ERC, and antenna rules. ing deep submicron effects, floorplan techniques in CMOS, FinFET, and GAA process technologies (7nm and below). Implementing layout matching techniques, ESD, latch-up, EMIR, DFM, and LEF generation. The Impact You Will Have: Enhancing the performance and reliability of Synopsys’ DDR/HBM/UCIe IPs. Accelerating the integration of advanced capabilities into SoCs. Reducing risk and improving time-to-market for differentiated products. Driving innovation in semiconductor technology and design. Contributing to the success of Synopsys’ Silicon IP business. Fostering a collaborative and inclusive work environment. What You’ll Need: BTech/MTech degree in a relevant field. 4+ years of experience in analog layout design. Proven track record in developing high-quality layouts and meeting verification timelines. Strong understanding of deep submicron effects and floorplan techniques. Exposure to layout matching, ESD, latch-up, EMIR, DFM, and LEF generation. Who You Are: Detail-oriented with excellent problem-solving skills. Collaborative and able to foster accountability and ownership. Strong written, verbal communication, and interpersonal skills. Committed to diversity and inclusion. The Team You’ll Be A Part Of: You will be part of a dynamic team focused on developing next-generation DDR/HBM/UCIe PHY IPs. Our team values innovation, collaboration, and continuous improvement, driving the success of Synopsys’ Silicon IP business. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. job Description and Requirements At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you

Hyderabad, Telangana, India Category: Information Technology Hire Type: Employee Job ID 10318 Date posted 04/24/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a talented, energetic, and experienced individual eager to join our Synopsys Cloud Operations Support team. You possess a strong foundation in Linux administration and Azure fundamentals, with a keen eye for detail and a dedication to maintaining comprehensive documentation and adhering to established processes. Your communication skills are exceptional, enabling you to convey technical concepts clearly to both technical and non-technical audiences. You excel in practical decision-making and agile goal delivery, thriving in a dynamic team environment where collaboration and problem-solving are key. Multi-tasking and effective prioritization come naturally to you, allowing you to manage R&D-related activities efficiently and communicate actions and results as needed. With a background in customer support, computer operations, or systems administration, you bring a wealth of experience to the table, particularly in UNIX system administration and network operations. What You’ll Be Doing: Designing, automating, and supporting Linux systems and services in a 24/7 production environment. Independently and collaboratively evaluating, recommending, and implementing technical solutions to meet business needs. Collaborating with other technical teams to solve problems and continually evolve the technology. Troubleshooting issues to identify root causes and help unblock the customer. Preparing and maintaining documentation of systems, standards, configurations, and procedures. Supporting day-to-day operations including installation, configuration, maintenance, and troubleshooting of the engineering secure computing environment. Responding to alerts, reporting issues, escalating problems as required, and resolving significant matters using independent judgment within established support practices. Ensuring compliance with Synopsys security policies to protect stakeholder information. The Impact You Will Have: Maintaining the high-performance Synopsys Cloud environment, ensuring smooth operations and compliance with security policies. Contributing to the overall reliability and scalability of our cloud infrastructure. Enhancing customer satisfaction by resolving technical issues promptly and effectively. Driving continuous improvements in our technology and processes through collaboration and innovation. Ensuring the security and integrity of our systems through vigilant monitoring and maintenance. Supporting Synopsys' mission to lead in chip design, verification, and IP integration by providing a robust and reliable cloud environment. What You’ll Need: Extensive knowledge of Linux operating systems and security patching. Experience with installing, monitoring, and administering Linux systems (Ubuntu and RHEL primarily). One or more Linux System Administrator Certifications. Experience with monitoring and logging tools. Programming/Scripting skills in Shell/Python. Basic Networking fundamentals including TCP/IP, DNS, subnetting, and routing. Knowledge of networking for virtual machines, particularly regarding security and performance. Knowledge of remote desktop software solutions such as VNC, Citrix Xen server, and VDI. Solid knowledge of infrastructure services like Kickstart, NFS, DNS, and DHCP. Knowledge in Azure resources like VM, Network, NSG, and Blob Storage is a plus. Who You Are: Ability to clearly communicate technical concepts to both technical and non-technical users. Proven ability to work in a dynamic team environment, collaboratively resolving problems spanning multiple disciplines. Enthusiastic and capable of learning on the job. The Team You’ll Be A Part Of: The team's purpose is to build, operate, and maintain a high-performance Synopsys Cloud environment. You will be part of a dynamic team that collaborates to solve complex problems and continually evolve our technology to meet business needs. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Hyderabad, Telangana, India Category: Information Technology Hire Type: Employee Job ID 10201 Date posted 03/20/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a seasoned Business Analyst with over 10 years of experience in IT, including at least 7 years in software testing and quality-related roles. Your expertise in Tricentis Tosca automation, particularly with SAP, Salesforce, Oracle CPQ, APIs, and web applications, sets you apart. You have a deep technical knowledge and understanding of software testing best practices and are proficient in automating User Experience (UX) for web-based, API, and desktop applications, including Vision AI+. You excel in test data management, continuous integration/continuous deployment (CI/CD) pipelines, and integrating Tricentis Tosca with QTest. Your leadership experience in test automation, collaborative mindset, and excellent communication skills make you an invaluable asset to any team. You are customer-centric, always seeking to deliver unique solutions, and you thrive in agile environments. You are open to learning new skills and technologies to stay ahead in a dynamic industry. What You’ll Be Doing: Designing and developing Test Automation Frameworks, approach, and methodologies for large enterprise projects. Creating, maintaining, and executing end-to-end test cases, test scripts, and test data. Defining test automation strategy, best practices, project structure, and review processes. Performing test infrastructure setup, upgrades, and migrations, including Tricentis Tosca. Managing users, projects, and test portfolios using Tosca Server and Tosca Commander. Integrating Tricentis Tosca with third-party tools. Conducting regular reviews and maintenance of the test portfolio to ensure adherence to best practices. Defining upgrade and maintenance approaches and performing necessary upgrades and migrations. Collaborating effectively with global cross-functional teams and stakeholders. Mentoring and guiding team members on test automation best practices. The Impact You Will Have: Enhancing the quality and reliability of software products through robust automation frameworks. Streamlining testing processes, leading to faster time-to-market for our solutions. Ensuring seamless integration of Tricentis Tosca with other tools and platforms. Driving continuous improvement in testing methodologies and practices. Providing leadership and mentorship to junior team members, fostering a culture of excellence. Contributing to the overall success and innovation of Synopsys' technology offerings. What You’ll Need: Minimum 7 years of experience in Tricentis Tosca automation with SAP, Salesforce, Oracle CPQ, APIs, Web applications, etc. Expertise in automating User Experience (UX) for Web-based, API, and Desktop applications, including Vision AI+. Proficient in Test Data management using Tricentis Data Services (TDS) and Tricentis Test Case Design (TCD). Experience in DEX Configuration & Execution. Ability to set up Continuous Integration/Continuous Deployment (CI/CD) pipelines with Tricentis Tosca. Expertise in QTest integration with Tosca Certifications TRICENTIS Certified SAP Testing Specialist TRICENTIS Certified Tosca Architect TRICENTIS Certified Automation Engineer TRICENTIS Certified QTest Specialist TRICENTIS Certified Test Design Specialist Who You Are: As a professional with a sophisticated understanding of software testing and automation, you possess excellent written and verbal communication skills, enabling you to effectively engage with diverse audiences. You have a customer-centric approach, always striving to deliver unique and impactful solutions. Your collaborative mindset allows you to work seamlessly within global cross-functional teams, and your openness to learning new skills and technologies ensures you remain at the forefront of industry advancements. You are a proactive leader, advocating for test-driven development (TDD) practices and driving necessary changes to achieve optimal results. The Team You’ll Be A Part Of: You will join a dynamic team of forward-thinking professionals dedicated to advancing software testing and automation practices. The team focuses on integrating cutting-edge technologies and methodologies to enhance the quality and reliability of our software products. Collaboration, innovation, and continuous improvement are at the core of our team's values, and we strive to create an environment where every member can thrive and contribute to our collective success. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 10790 Remote Eligible No Date Posted 22/04/2025 Job Description and Requirements You Are: You are a highly motivated Staff Engagement Applications Engineer with over 4+ years of hands-on experience in synthesis or place and route (P&R). You have a robust understanding of the Synthesis concepts and are eager to work closely with R&D on driving product and methodology development. You thrive in dynamic environments and possess excellent communication skills, including a strong command of English. Your background in EE/CS, coupled with your experience with EDA tools like DC, FM, ICC2, and Fusion Compiler, makes you an ideal fit for this role. What You’ll Be Doing: Providing Customer Support and Collaborating with R&D teams to drive product development for wide deployment. Demonstrating differentiated PPA results to showcase our technology's superiority. Providing technical support to key global customers to address PPA bottlenecks and design challenges on the most advanced designs. Aggressively engaging in worldwide critical benchmarks and deployments to ensure the highest quality and performance of designs. Utilizing scripting languages such as Perl and Tcl for automation and optimization tasks. Staying updated with the latest advancements in ASIC design flow, VLSI, and CAD development to continually improve processes. The Impact You Will Have: Enhancing the performance and efficiency of Fusion Compiler designs. Driving innovations that contribute to the success of Synopsys' cutting-edge technologies. Providing critical support that helps key customers overcome their PPA challenges. Contributing to the development of new features that keep Synopsys at the forefront of the industry. Improving the overall quality and reliability of our products through meticulous design and optimization. Fostering strong relationships with global customers, reinforcing Synopsys' reputation as a leader in chip design and software security. What You’ll Need: BS/MS in Electrical Engineering or Computer Science with 4+ years of relevant experience. Hands-on experience with synthesis and place and route (P&R) tools. Proficiency with EDA tools such as DC, FM, ICC2, and Fusion Compiler. Knowledge of advanced placement and routing rules. Experience with scripting languages like Perl and Tcl. Strong understanding of ASIC design flow, VLSI, and CAD development. Never give-up attitude and flexibility in supporting worldwide engagements. Who You Are: Excellent communicator with strong command of English. Highly motivated and self-driven. Detail-oriented with a focus on quality and performance. A team player who thrives in collaborative environments. Adaptable and eager to learn new technologies and methodologies. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 9520 Remote Eligible No Date Posted 23/02/2025 Standard Cell Layout Designer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate and innovative engineer eager to tackle the challenges presented by cutting-edge technologies. You thrive in a dynamic environment and are motivated by the opportunity to make a significant impact on the world through your work. With a solid foundation in electronics and digital logic, you possess a deep understanding of CMOS processes and are familiar with ASIC design flows. Your expertise in custom/semi-custom cell development and layout automation sets you apart, and you are adept at leveraging AI-based solutions to enhance design processes. Your proficiency in programming languages such as C, Python, Perl, and UNIX enables you to develop and implement efficient solutions. As a natural leader, you can guide projects to successful completion, making informed decisions based on timelines and technological challenges. Your innovative thinking and systematic approach to problem-solving are complemented by your excellent communication skills, allowing you to collaborate effectively with teams across the globe. If you are ready to embrace a "Yes if" mindset and drive innovation, Synopsys is the perfect place for you. What You’ll Be Doing: Designing and developing custom and semi-custom cells for ASICs. Automating layout processes to enhance efficiency and accuracy. Collaborating with cross-functional teams to ensure seamless integration of designs. Utilizing EDA tools for layout and schematic design. Implementing AI-based solutions to optimize design workflows. Leading projects, making strategic decisions, and ensuring timely delivery. The Impact You Will Have: Advancing the development of high-performance silicon chips. Driving innovation in layout automation and custom cell development. Enhancing design processes through AI-based solutions. Ensuring the seamless integration of complex designs into final products. Contributing to the success of groundbreaking technologies in various industries. Supporting Synopsys' mission to lead in chip design and IP integration. What You’ll Need: Good understanding of electronics basic concepts and applications. In-depth knowledge of logic gates, flip flops, latches, multiplexers, level shifters, and digital logics. Experience with CMOS design and layout concepts, especially in lower node technologies. Familiarity with ASIC design flow and layout automation. Proficiency in programming languages such as C, Python, Perl, and UNIX. Who You Are: Adept at innovative and out-of-the-box thinking. Systematic in your approach to problem-solving. Excellent written and verbal communication skills. Comfortable working with diverse teams globally. Capable of leading projects and making strategic decisions. The Team You’ll Be A Part Of: You will join a dynamic team focused on pushing the boundaries of chip design and layout automation. Our team thrives on collaboration and innovation, working together to develop cutting-edge solutions that drive the future of technology. You will have the opportunity to work alongside some of the brightest minds in the industry, contributing to projects that have a global impact. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 9277 Remote Eligible No Date Posted 16/02/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. Our group develops Controller IPs (PCIe/CXL) which help customers in integrating more capabilities into an SoC faster. Plus meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk. You Are: An experienced and visionary ASIC Design Architect Engineer with a proven track record in delivering Controller IP products. You possess deep functional knowledge and expertise in digital design/development methodologies, and you thrive in an environment where you can influence and implement strategic goals. Your background includes a comprehensive understanding of serial protocols such as PCIe/CXL/AXI/CHI etc. You can define and execute design/architecture for protocols such as PCIe/CXL. You are a proactive problem solver, capable of working with minimal oversight, and you excel in communicating complex technical concepts to a diverse audience. Your leadership skills enable you to guide and mentor teams, fostering innovation and excellence in all your projects. What You’ll Be Doing Responsible for PCIe/CXL next-gen Controller IP features Customer pre/post sales PCIe/CXL protocol related communication Utilizing advanced design methodologies and tools to achieve high-quality results Mentoring and guiding other engineers, promoting best practices, and fostering a culture of continuous improvement Communicating with internal and external stakeholders to align on project goals and deliverables. What You’ll Need: Extensive experience in digital ASIC design and physical aware synthesis. In-depth knowledge of PCIe, CXL , AXI, CHI and similar IO protocols. Proficiency in advanced digital design tools and methodologies. Strong problem-solving skills and the ability to work independently. Excellent communication skills for effective collaboration with diverse teams. Experience of 20+ years in relevant domain. Who You Are: A mentor who fosters talent and encourages innovation. A proactive problem solver who thrives in complex environments. An effective communicator with the ability to convey technical concepts to a broad audience. A team player who values collaboration and diversity. Synopsys values the diversity of our workforce. We are committed to provide access & opportunity to individuals with disabilities and will provide reasonable accommodation to individuals throughout the recruitment and employment process. Should you require an accommodation, please contact [email protected] . At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Noida, Uttar Pradesh, India Category: Engineering Hire Type: Employee Job ID 7228 Date posted 02/24/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a passionate and dedicated individual with a strong background in Electronics and Communication Engineering or Computer Science. You have a keen interest in software development and system validation, and you are eager to your skills in a dynamic and innovative environment. You thrive on solving complex problems and are always ready to take on new challenges. Your technical prowess is complemented by your excellent communication skills, making you an effective team player and a valuable contributor to any project. You have a meticulous eye for detail and a commitment to delivering high-quality work. You are not only technically proficient but also adaptable, able to quickly learn new tools and methodologies. Your previous experience in embedded systems, board-level testing, and programming in C/C++ sets you apart, and you are excited about the opportunity to work with high-speed serial interfaces and FPGA-based setups. Your proactive approach and analytical mindset enable you to excel in a fast-paced, collaborative environment. What You’ll Be Doing: Developing and testing software for validation and automation purposes. Performing device-level and system-level validation and debug in post-silicon environments. Executing software tests in verification environments to ensure product quality. Working with FPGA-based setups to run validation tests and update FPGA RTL modules as needed. Creating detailed test and validation reports with statistical analysis. Interfacing with customers to capture requirements and provide post-release support. The Impact You Will Have: Contributing to the development of cutting-edge technology that drives innovation in various industries. Ensuring the reliability and performance of high-speed serial interface PHYs like USB, PCIe, and Ethernet. Enhancing the validation and debug processes through meticulous testing and analysis. Improving the overall quality and functionality of Synopsys products through rigorous validation. Supporting the continuous improvement of product development cycles. Providing valuable insights and feedback to enhance future product iterations. What You’ll Need: B.Tech in ECE/CS or equivalent with 3-7 years of previous experience in a similar role/industry. Experience in programming and testing using C/C++. Board-level test and debug experience using lab equipment. Experience with embedded or resource-constrained environments. Development experience on Unix, Linux, and Windows platforms. Ability to quickly learn new workflows and adapt to new technologies. Exposure to MATLAB/Python programming is a plus. Exposure to verification and basic RTL is a plus. Excellent verbal and written communication skills. Who You Are: A proactive and motivated individual with a passion for technology and innovation. An effective communicator who can articulate technical concepts clearly and concisely. A team player who collaborates well with others and contributes to collective goals. A detail-oriented professional with a strong analytical mindset. An adaptable learner who thrives in dynamic environments and embraces new challenges. The Team You’ll Be A Part Of: You will be part of a dedicated team focused on the development and validation of high-speed serial interfaces and embedded systems. The team collaborates closely to ensure the quality and performance of Synopsys products, leveraging a diverse set of skills and expertise. You will work alongside experienced engineers who are passionate about technology and committed to driving innovation. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Noida, Uttar Pradesh, India Category: Engineering Hire Type: Employee Job ID 9672 Date posted 03/02/2025 Candidate will be part of VC PS Noida team. Design, develop, troubleshoot the core algorithms. Design and develop standard and customized features / checks in VC PS for inference, propagation and verification. Will be working with other local and global teams. Design and development of state of the art EDA tools involving development of new and innovative algorithms. Create test cases to test the developed feature. Skills Required Ability to develop new software architecture and good leadership skills. Fluent in C/C++ with extensive work experience in data-structures and algorithms. Excellent algorithm analysis skills and a good knowledge of data structures. Good knowledge of Tcl and Perl-based development on Unix. Good knowledge of Verilog, SystemVerilog & VHDL HDL. Familiarity with ASIC design flow and the EDA tools and methodologies used therein. Familiarity with multi-threaded and distributed code development. Self-motivation, self- discipline and the ability to set personal goals and work consistently towards them in a dynamic environment will go far towards contributing to your success. Quality focus - one who believes in quality and wants to make a difference. Experience of production code development on Unix/Linux platforms. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 6673 Remote Eligible No Date Posted 28/10/2024 Alternate Job Titles: ASIC Physical Design Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly motivated and experienced Physical Design Engineer with a passion for implementing and performing signoff verifications of digital blocks using ASIC design flow (Gate2GDSII). You thrive in dynamic environments and have a knack for problem-solving and innovation. Your expertise in digital block implementation, from gate netlist to GDSII, is complemented by your hands-on experience with state-of-the-art ASIC flows. You understand the intricacies of design initialization, power planning, floor planning/macro placement, scan-chain reordering, CTS, route, and chip finishing steps. You have a solid foundation in physical implementation, signoff verifications (DRC, LVS, Antenna), and reliability verifications (EMIR, ESD). Your ownership of writing MCMM and UPF for block designs showcases your leadership and technical prowess. You are adept at providing handoff data to other signoff closure like STA, formality, layout, and reliability verification. With a minimum of 5 years of relevant experience in the physical design domain and a B.E/B.Tech/M.Tech in ECE/EE, you are ready to take on new challenges and contribute to groundbreaking projects. What You’ll Be Doing: Implementing digital blocks using state-of-the-art gate to GDSII ASIC flows. Performing physical implementation of blocks from gate netlist to GDSII. Conducting signoff verifications, including layout verifications (DRC, LVS, Antenna) and reliability verifications (EMIR, ESD). Writing MCMM and UPF for block designs. Providing handoff data for other signoff closure processes like STA, formality, layout, and reliability verification. Collaborating with cross-functional teams to ensure the successful integration and testing of physical designs. The Impact You Will Have: Enhancing the quality and reliability of our digital block implementations. Driving innovation in physical design methodologies and processes. Enabling the successful deployment of high-performance silicon chips. Contributing to the development of cutting-edge technology that powers next-generation applications. Supporting the continuous improvement of our ASIC design flow and tools. Ensuring the seamless integration of physical designs into larger systems and platforms. What You’ll Need: In-depth understanding of the ASIC physical design flow steps from gate netlist. Experience in testchip implementation and testing exposure is a plus. Exposure to Synopsys toolset (such as FC/ICC2, Primetime, Formality, ICV) is highly desirable. Experience with FinFET designs is desirable. Experience in working on IO integration with wire-bond or flip-chip design is a big plus. Who You Are: A problem solver with strong analytical skills. Detail-oriented with a focus on quality and reliability. Effective communicator and collaborator. Innovative thinker with a passion for technology. Self-motivated and able to work independently. The Team You’ll Be A Part Of: Join a dynamic team of experts focused on pushing the boundaries of physical design and implementation. Our team is dedicated to continuous innovation and excellence, working collaboratively to solve complex challenges and deliver cutting-edge solutions. You'll be part of a supportive and inclusive environment where your contributions are valued and your professional growth is nurtured. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Noida, Uttar Pradesh, India Category: Engineering Hire Type: Employee Job ID 9877 Date posted 03/04/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a seasoned professional with a passion for cutting-edge technology and innovation. With 8 -12 years of experience, you bring a wealth of knowledge in CMOS memory design and circuit implementation. Your expertise lies in developing non-volatile memories or SRAM. You are proficient in schematic entry, circuit simulation, layout planning, and design verification. You thrive in a collaborative environment, interfacing with CAD and Frontend engineers to drive memory compiler automation and EDA model generation. Your attention to detail ensures the highest quality in circuit and physical layout design. Self-motivated and self-directed, you demonstrate excellent analytical and problem-solving skills. You are adept at programming in C-Shell or Perl. Your strong command of English, both verbal and written, enables you to communicate effectively with team members and stakeholders. You are committed to continuous learning and professional growth, and you bring professionalism, critical thinking, and a focus on future goals to your work. Inclusion and diversity are important to you, and you contribute to a collaborative and inclusive work environment. What You’ll Be Doing: Develop CMOS embedded non-volatile memories such as MRAM and RRAM. Design architecture and circuit implementation, focusing on high speed, low power, and high-density designs. Perform schematic entry, circuit simulation, layout planning, layout supervision, design verification, and validation. Interface with CAD and Frontend engineers for memory compiler automation, EDA model generation, and full verification flow. Perform design verification and drive physical layout design and verification. Provide support and/or perform other duties as assigned and required. The Impact You Will Have: Contribute to the development of high-performance silicon chips and software content. Enhance the efficiency and performance of our CMOS non-volatile memory designs. Drive innovation in high speed, low power, and high density memory designs. Ensure the highest quality in circuit development and physical layout design. Collaborate effectively with CAD and Frontend engineers to streamline automation and verification processes. Support the continuous improvement and advancement of our memory design technology. What You’ll Need: Bachelor’s or Master’s degree in Electrical Engineering, Telecommunication, or related fields. Proficiency in CMOS memory design(NVM or SRAM), circuit simulation, memory layout designs, layout parasitic extraction, and layout verification tools and debugging techniques. Basic circuit know-how of Charge Pump, Voltage Regulator, Current Mirror, Reference voltage and current, Comparators preferred Programming capability in C-Shell or Perl Strong analytical and problem-solving skills with attention to detail. Experience in developing documents, reports, or presentations for a range of tasks. Who You Are: Self-motivated, self-directed, detail-oriented, and well-organized. Possess excellent analytical, problem-solving, and negotiation skills. Capable of leading and mentoring trainees and junior engineers, as well as managing projects. Strong command of English, both verbal and written. Exhibit strong interpersonal communication and teamwork skills. Professional, critical/logical thinker, and focused on future goals. Highly committed to continuous learning and professional development. The Team You’ll Be A Part Of: You will be a key member of our innovative R&D Engineering team, focused on developing cutting-edge CMOS embedded non-volatile memories (MRAM/RRAM). Our team thrives on collaboration and continuous improvement, working together to achieve technological advancements that shape the future. You will have the opportunity to lead and mentor junior engineers, contributing to a culture of learning and excellence. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 10481 Remote Eligible No Date Posted 13/04/2025 Staff ASIC Verification Engineer, Noida Location: Key responsibilities: Participate in development of verification test plan, verification environment documentation and test environment usage documentation Evaluates and exercises various aspects of the development flow. May include such items as Verilog/SystemVerilog development, functional simulation, constraint development, test planning, behavioral modelling, and verification coverage metrics (functional coverage and code coverage) Collaborate with architect, designers , VIP team and peers to accomplish all verification goals. Identify design problems, possible corrective actions and/or inconsistencies on documented functionality Adhere to quality standards and good test and verification practices. May work to coach junior engineers and help them in debugging complex problems. Key Qualifications Proven desire to learn and explore new state of the art technologies Demonstrate good written and spoken English communication skills Demonstrate good review and problem-solving skills Knowledgeable with Verilog, VHDL and/or SystemVerilog Knowledgeable with scripting languages (BASH/TCSH/PERL/PYTHON/TCL) is a plus Understanding of verification methodology such as UVM . Good organization and communication skills. 5 + years of relevant experience At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Noida, Uttar Pradesh, India Category: Engineering Hire Type: Employee Job ID 8827 Date posted 02/24/2025 Experience : 5yrs to 12 years Expertise in UVM and System Verilog Experience in verification IP modelling with knowledge of test case coding, scoreboard design, assertions, checkers & functional coverage. Involved & played a driving role in the development of reusable Verification environments for at least 2 verification projects using VMM/OVM/UVM methodologies. Protocol experience: Should have experience on UCIe/PCIe/CXL/Unipro/USB/MIPI/HDMI/Ethernet/DDR/LPDDR/HBM memory protocol Job responsibilities: Able to contribute to the development of the VIP Responsible & can be relied on for review sign-off of VIP development and updates from a technical perspective including methodology and protocol functional prospective. Liaison with Architects/methodology experts to achieve resolutions on issues or driving output from an architecture/methodology perspective. Locally should be to be "go-to" person on all technical aspects of VIP At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Noida, Uttar Pradesh, India Category: Engineering Hire Type: Employee Job ID 10738 Date posted 04/23/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a seasoned engineer with a passion for pushing the boundaries of technology. With 5 -8 years of experience, you bring a wealth of knowledge in software architecture and leadership. You excel in C/C++ software development, and your strong background in design patterns, data structures, and algorithms sets you apart. You thrive in multi-threaded and distributed code environments, and your familiarity with ASIC design flow and EDA tools is second to none. Your expertise in Verilog, SystemVerilog, and VHDL HDL, coupled with your experience in Unix/Linux platforms, makes you a valuable asset. You are well-versed in developer tools like gdb and Valgrind, and you understand the importance of source code control tools such as Perforce. Your analytical and problem-solving skills are top-notch, and you are always eager to learn and explore new technologies. As a highly enthusiastic and energetic team player, you are ready to go the extra mile to achieve success. What You’ll Be Doing: - Designing, developing, and troubleshooting core algorithms for word-level synthesis. - Collaborating with local and global teams to enhance synthesis QoR, performance, and logic interference. - Engaging in pure technical roles focused on software development and architecture. - Implementing multi-threaded and distributed code solutions. - Utilizing your knowledge of ASIC design flow and EDA tools to drive innovation. - Leveraging your expertise in Verilog, SystemVerilog, and VHDL HDL to develop cutting-edge solutions. The Impact You Will Have: - Driving technological innovation in chip design and verification. - Enhancing the performance and quality of synthesis tools used globally. - Solving complex logic interference problems to improve design accuracy. - Contributing to the development of high-performance silicon chips and software content. - Collaborating with cross-functional teams to achieve project milestones. - Pioneering new software architectures that set industry standards. What You’ll Need: - Strong hands-on experience in C/C++ based software development. - Deep understanding of design patterns, data structures, algorithms, and programming concepts. - Familiarity with multi-threaded and distributed code development. - Knowledge of ASIC design flow and EDA tools and methodologies. - Proficiency in Verilog, SystemVerilog, and VHDL HDL. Who You Are: - Highly enthusiastic and energetic team player with excellent communication skills. - Strong desire to learn and explore new technologies. - Effective problem-solver with a keen analytical mind. - Experienced in working on Unix/Linux platforms. - Adept at using developer tools such as gdb and Valgrind. The Team You’ll Be A Part Of: You will be part of the word-level synthesis team, catering to multiple EDA products. This team focuses on developing innovative solutions to improve synthesis quality of results (QoR), performance, and logic interference. You will work closely with both local and global teams to drive technological advancements and achieve project goals. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Noida, Uttar Pradesh, India Category: Engineering Hire Type: Employee Job ID 9901 Date posted 03/18/2025 Alternate Job Titles: Senior Verification Engineer, IP Verification Specialist, RTL Design Verification Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a highly skilled and motivated professional with a passion for design verification in the semiconductor industry. With a solid foundation in Electrical/Electronic Engineering, Computer Engineering, or Computer Science, you possess 4 to 8 years of hands-on experience in IP/SOC verification domains. Your expertise in industry-standard EDA tools, fault injection methods, and diagnostic coverage techniques sets you apart. You excel in creating test environments from functional specifications using methodologies like UVM/VMM/OVM and are proficient in advanced languages such as Verilog and System Verilog. Your strong analytical skills enable you to identify safety gaps in designs, ensuring robust and reliable IP cores. As an excellent communicator, you collaborate effectively with international teams, driving innovation and achieving project milestones. Your ability to work independently, precisely, and generate quality documentation makes you a valuable asset to our team. Experience with ISO26262 developments, fault injection, and scripting languages like Perl, TCL, or Python would be highly advantageous. What You’ll Be Doing: Developing design verification solutions for RTL-based IP Cores implementing complex protocols. Collaborating with architects, designers, and verification team members across multiple international sites. Performing fault injection on IP/SOC RTL designs to identify and address safety gaps using FMEDA data. Creating and running test environments from functional specifications using UVM/VMM/OVM methodologies. Analyzing fault lists and developing test cases for fault injection to achieve diagnostic coverage. Debugging designs in simulation and providing verification solutions for productivity, performance, and throughput improvement. The Impact You Will Have: Ensuring the reliability and safety of IP Cores used in automotive end-customer applications. Contributing to the development of high-performance silicon chips that drive innovation in the semiconductor industry. Enhancing the diagnostic coverage and safety standards of our IP designs. Improving the overall efficiency and performance of our verification processes. Collaborating with global teams to achieve project milestones and deliver high-quality IP solutions. Driving continuous technological innovation in the verification domain. What You’ll Need: Degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science. 4 to 8 years of experience in IP/SOC verification domains. Hands-on knowledge of fault injection methods and diagnostic coverage techniques. Proficiency in Verilog, System Verilog, and debugging designs in simulation. Experience with UVM/VMM/OVM methodologies and creating test environments from functional specifications. Who You Are: An independent and precise worker with a drive for innovation. An excellent communicator with strong documentation skills. A collaborative team player who excels in problem-solving. Ideally experienced in ISO26262 developments and fault injection. Knowledgeable in C/C++, Shell, and scripting languages like Perl, TCL, or Python. The Team You’ll Be A Part Of: You will be part of the IP Group at Synopsys, working with a talented team of architects, designers, and verification engineers across multiple international sites. Our team focuses on developing robust and reliable IP Cores for automotive applications, driving innovation and ensuring the highest standards of safety and performance. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Noida, Uttar Pradesh, India Category: Engineering Hire Type: Employee Job ID 10754 Date posted 04/17/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are an innovative and analytical thinker with a passion for technology and a drive to solve complex engineering challenges. You thrive in a collaborative environment, working alongside a high-caliber team of engineers to develop technical solutions that push the boundaries of AI-driven optimization. You possess a strong foundation in computer science or electronics, with a deep understanding of C/C++ and Linux. Your excellent communication skills enable you to effectively convey ideas and work seamlessly with product engineers to define and solve problems. You are committed to continuous improvement, always seeking ways to enhance performance and quality in your work. Your ability to debug issues, optimize algorithms, and develop new features makes you an invaluable asset to any engineering team. What You’ll Be Doing: Developing SignOff ECO optimization algorithms and heuristics. Debugging issues related to design loading and timing/power optimization. Striving for continuous improvements in QoR to achieve faster timing convergence with optimal power overhead. Collaborating with a team of engineers to develop technical solutions to complex problems. Communicating with product engineers to understand and define problem scope. Ensuring strict performance and quality requirements are met. The Impact You Will Have: Enhancing the performance and efficiency of PrimeClosure, the industry's first AI-driven signoff ECO solution. Contributing to the development of cutting-edge algorithms that optimize timing and power in chip design. Improving the overall quality and reliability of our products through rigorous debugging and testing. Driving innovation and continuous improvement in our engineering processes. Supporting customer success by resolving issues and implementing new features based on their feedback. Helping shape the future of AI-driven optimization in the semiconductor industry. What You’ll Need: 5+ years off relevant experience A degree in Computer Science or Electronics. Strong analytical and problem-solving skills. Proficiency in C/C++ and Linux. Excellent communication and teamwork abilities. A passion for technology and innovation. Who You Are: A collaborative team player who thrives in a dynamic and innovative environment. A proactive and self-motivated individual with a strong attention to detail. An excellent communicator who can articulate complex ideas clearly and effectively. A creative thinker who is always looking for new ways to solve problems and improve processes. A dedicated professional committed to delivering high-quality work. The Team You’ll Be A Part Of: You will be part of the PrimeClosure R&D team, responsible for developing and maintaining the industry's first AI-driven signoff ECO solution, PrimeClosure. This team is dedicated to pushing the boundaries of technology and innovation, working collaboratively to develop cutting-edge solutions that address complex engineering challenges. Together, you will strive for continuous improvements in performance and quality, ultimately shaping the future of AI-driven optimization in the semiconductor industry. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 9277 Remote Eligible No Date Posted 16/02/2025 We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. Our group develops Controller IPs (PCIe/CXL) which help customers in integrating more capabilities into an SoC faster. Plus meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk. You Are: An experienced and visionary ASIC Design Architect Engineer with a proven track record in delivering Controller IP products. You possess deep functional knowledge and expertise in digital design/development methodologies, and you thrive in an environment where you can influence and implement strategic goals. Your background includes a comprehensive understanding of serial protocols such as PCIe/CXL/AXI/CHI etc. You can define and execute design/architecture for protocols such as PCIe/CXL. You are a proactive problem solver, capable of working with minimal oversight, and you excel in communicating complex technical concepts to a diverse audience. Your leadership skills enable you to guide and mentor teams, fostering innovation and excellence in all your projects. What You’ll Be Doing Responsible for PCIe/CXL next-gen Controller IP features Customer pre/post sales PCIe/CXL protocol related communication Utilizing advanced design methodologies and tools to achieve high-quality results Mentoring and guiding other engineers, promoting best practices, and fostering a culture of continuous improvement Communicating with internal and external stakeholders to align on project goals and deliverables. What You’ll Need: Extensive experience in digital ASIC design and physical aware synthesis. In-depth knowledge of PCIe, CXL , AXI, CHI and similar IO protocols. Proficiency in advanced digital design tools and methodologies. Strong problem-solving skills and the ability to work independently. Excellent communication skills for effective collaboration with diverse teams. Experience of 20+ years in relevant domain. Who You Are: A mentor who fosters talent and encourages innovation. A proactive problem solver who thrives in complex environments. An effective communicator with the ability to convey technical concepts to a broad audience. A team player who values collaboration and diversity. Synopsys values the diversity of our workforce. We are committed to provide access & opportunity to individuals with disabilities and will provide reasonable accommodation to individuals throughout the recruitment and employment process. Should you require an accommodation, please contact hr-help-canada@synopsys.com. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Category Engineering Hire Type Employee Job ID 8601 Remote Eligible No Date Posted 22/04/2025 Alternate Job Titles: Staff SOC Engineer Senior SOC Design Engineer Lead SOC Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are an experienced and motivated SOC Engineer with a passion for cutting-edge technology and innovation. With a strong background in system-on-chip (SOC) design and verification, you bring a wealth of knowledge and a keen eye for detail. You thrive in a collaborative environment, working seamlessly with cross-functional teams to deliver high-quality solutions. Your problem-solving skills are exceptional, and you have a proven track record of successfully managing complex projects. You are proactive, adaptable, and always eager to learn and grow in a dynamic and fast-paced setting. What You’ll Be Doing: Designing and implementing SOC solutions for various applications, ensuring high performance and reliability. Collaborating with cross-functional teams to define and develop SOC architecture and specifications. Conducting verification and validation of SOC designs to ensure compliance with industry standards and customer requirements. Optimizing SOC designs for power, performance, and area (PPA) to meet project objectives. Debugging and resolving issues in SOC designs, utilizing advanced tools and methodologies. Providing technical guidance and mentorship to junior engineers, fostering a culture of continuous improvement and innovation. Job Description and Requirements The role is for RTL Design and Signoff of IP/Subsystem/SoC Design in the System Solutions Group (SSG). At SSG, we are a team of experts in various Synopsys technologies to deliver architecture, design, verification, implementation, tools, methodology to enable our customers complete their most challenging SoC Design projects. Our work spans from sub-blocks to full turnkey end-to-end SoCs. Our customers range from start-ups to industry leaders, commercial companies, and government agencies. As part of this role, you can expect to develop and deliver your expertise in RTL Signoff and RTL Design Techniques while working on activities such as Lint/CDC/RDC Checks, Timing Constraints Development, Preliminary Synthesis, Formality and RTL Design. The role will expose you to various innovative technologies deployed for RTL Quality Signoff for Semiconductors. Responsibilities Perform RTL Quality Signoff Checks such as LINT, CDC, RDC. Understand the design/architecture and develop timing constraints for synthesis and timing. Run preliminary synthesis to ensure that the design can be synthesized as intended. Run formality to ensure equivalence of RTL and gates. Integrate IPs in SoCs/Subsystems and create RTL design as per need of the customer. Required B.E/B. Tech/M.E/M. Tech in electronics with 4-9 years’ experience in RTL Design and Verification. Hands-on experience on static verification tools such as Spyglass performing LINT, CDC, RDC. Good conceptual understanding of design/architecture pitfalls across clock/reset domain crossing. Good conceptual understanding of RTL rule checks. Hands-on experience on synthesis and timing constraints development. Candidates with experience on ARM based technologies (Coresight Debug, Processor architecture, etc.) will be preferred. The Team You’ll Be A Part Of: You will join a highly skilled and motivated team dedicated to developing advanced SOC solutions. Our team focuses on innovation, collaboration, and excellence, working together to deliver high-quality designs that drive technological advancements. We value diversity and inclusion, fostering a supportive and dynamic environment where every team member can thrive and contribute to our success. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Noida, Uttar Pradesh, India Category: Engineering Hire Type: Employee Job ID 8857 Date posted 02/24/2025 Staff Embedded Memory Design Engineer We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are an innovative and dedicated engineer with a passion for embedded memory compilers. With 2-5 years of experience in Embedded SRAM compilers, you possess a robust understanding of CMOS digital circuits, and any knowledge of FinFET technology is a plus. Your expertise in transistor-level circuit design allows you to navigate the complexities of read/write margins and timing races. You thrive in a collaborative environment, often engaging with senior internal and external personnel to achieve the best possible outcomes. You are a problem-solver who can work independently, taking ownership of tasks while effectively coordinating with the layout team to resolve design and layout issues. Your ability to comprehensive knowledge creatively makes you an invaluable asset to our team. What You’ll Be Doing: Designing, developing, and troubleshooting embedded memory compilers. ing skills in memory compilers, focusing on transistor-level circuit design. Understanding various memory design aspects such as read/write margins and timing races to find effective solutions. Interacting with the layout team to address and resolve issues from both design and layout standpoints. Working independently on tasks, ensuring ownership and collaboration to achieve optimal results. Engaging frequently with senior personnel to leverage expertise and enhance project outcomes. The Impact You Will Have: Enhancing the performance and reliability of embedded memory compilers. Driving innovation in memory design, contributing to the development of high-performance silicon chips. Collaborating with cross-functional teams to optimize design and layout processes. Ensuring timely delivery of robust and efficient memory solutions. Contributing to the continuous improvement of design methodologies and practices. Supporting the advancement of Synopsys' technology leadership in the semiconductor industry. What You’ll Need: 2-5 years of experience in Embedded SRAM compilers. Strong understanding of CMOS digital circuits. Knowledge of FinFET technology (preferred). Proficiency in transistor-level circuit design. Ability to analyze and resolve design and layout issues effectively. Who You Are: Innovative and detail-oriented. Collaborative team player. Effective communicator with strong interpersonal skills. Problem-solver with a proactive approach. Self-motivated and able to work independently. The Team You’ll Be A Part Of: You will join a dynamic and dedicated team focused on the design and development of embedded memory compilers. Our team prides itself on fostering an environment of collaboration and innovation, working together to push the boundaries of technology and deliver cutting-edge solutions. As part of this team, you will have the opportunity to engage with experienced professionals and contribute to projects that shape the future of the semiconductor industry. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.