Staff Emulation and Prototyping Engineer

7 - 10 years

9 - 12 Lacs

Posted:2 days ago| Platform: Naukri logo

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Full Time

Job Description

Staff Emulation Prototyping Engineer
The Engineering Enablement team is responsible for providing tools, methodologies, and support to engineering teams to accelerate product development across the company. This position is for an opening in the Systems Verification and Validation (SVV) group within the Engineering Enablement organization in the Vertical BU. SVVs charter spans from defining, building and promoting the adoption of design verification tools and methodologies to executing high-value engagements that directly improve product outcomes and build long-term DV capability across ADI. SVV owns the entire DV technology spectrum, such as, UVM, Formal, FUSA, Security, Mixed-Signal, Emulation and Prototyping methodologies . This role is focused on driving Emulation and Prototyping.
Job Responsibilities :
  • Lead, Develop and deploy best in class Emulation/Prototyping tools and methodologies across ADI Product Lines as part of Verification eXcellence Program (VXP)
  • Develop and deploy Accelerated Verification IPs, Synthesizable BFMs and help in integration of memory models of various interfaces
  • Engaging with EDA vendors to influence their development roadmaps to meet ADI s requirements into the future
  • Working with cross-functional teams (DV, hardware, software), own end-to-end bring-up of new designs, debug issues and explore new methodologies that improve the overall verification flow
  • Training, deployment, and support of verification methodologies within ADI

Position Requirements :
  • Bachelors/master s degree in electrical/Electronics/VLSI with 7-10 years of experience
  • Experience in emulation/prototyping platforms such as Zebu/HAPs is highly preferred.
  • Experience in ASIC RTL to Emulation model creation, timing constraints, sanity development and Bring up
  • Experience in working with transactors and setting up runtime environment using C/C++/DPIs
  • Exposure to JTAG, UART and Speed Bridges (Ethernet/USB) validation is highly preferred
  • Expertise in one or more of scripting languages (shell, python, perl) is highly preferred
  • Proficient in SV, UVM, integration of third party VIPS, Accelerated VIPS is required
  • Exposure to VCS/Verdi for compilation and debugging issues
  • Experience with Vplan/Test plan development and development of verification environment from ground up is good
  • Experience in ARM/RISC cpu and common communication protocols such as AMBA, I2C, SPI, UART and Ethernet is an added advantage
  • Should be able to communicate technical details very effectively with both customers (product line teams) and peers
  • Work in collaboration with design/verification and customer teams
  • Mentor and guide junior engineers and help them to grow in the ladder
  • Good analytical and debugging skills

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