SoC & FPGA Performance Architect

We are looking for highly skilled and motivated System-on-Chip & FPGA Performance Modeling architects who will be responsible for developing and simulating models of performance critical hardware components. As a member of the Architecture team, you will collaborate closely with fellow architects and designers to explore early design space across potential architectures at FPGA level, interconnect level, and within subsystems. Your primary goal will be to achieve best-in-class Power, Performance and Cost as a function of features. You will take ownership of performance throughout the development lifecycle, starting from concept development, design, all the way to silicon validation. This role requires cross-team collaboration involving architecture exploration, TLM model development, workload analysis, performance evaluation, correlation to cycle-accurate RTL and Silicon, and enabling customers to evaluate the performance of their FPGA systems. The ideal candidate should possess strong C++ and SystemC coding skills for developing TLM2.0 performance models, testbenches, and workloads. Additionally, knowledge of data movement within modern SoC architectures such as interconnect, DDR, PCIe, Ethernet, and embedded processors is required. Familiarity with state-of-the-art Performance modeling methods with a focus on realizable performance in the final product is crucial. While FPGA knowledge is a plus, it is not essential. Candidates with a Bachelors, Masters, or PhD degree in Electrical Engineering, Computer Engineering, Computer Science, or a closely related field are encouraged to apply for this position.,