SMTS Silicon Design Engineer

1 - 4 years

17 - 19 Lacs

Posted:18 hours ago| Platform: Naukri logo

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Job Type

Full Time

Job Description

KEY RESPONSIBLITIES:

  • Implementation and verification of DFT architecture and features
  • Scan insertion and ATPG pattern generation
  • ATPG patterns verification with gate-level simulation
  • Test coverage and test cost reduction analysis
  • Post silicon support to ensure successful bring up and enhance yield learning

PREFERRED EXPERIENCE:

  • Understanding of Design for Test methodologies and DFT verification experience ( eg. IEEE1500, JTAG 1149.x, Scan, memory BIST etc .)
  • Experience with Mentor testkompress and/or Synopsys Tetramax /DFTMAX
  • Experience with VCS simulation tool, Perl/Shell scripting, and Verilog RTL design

ACADEMIC CREDENTIALS:

  • Bachelors or Masters degree in computer engineering/Electrical Engineering

 

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