About the Company:
Founded with the vision of building a runtime reconfigurable, future-proof processor, Morphing Machines is a fabless semiconductor company working on a ground-breaking technology that will transform the chip design landscape. Morphing Machines patent protected IP, REDEFINE, can concurrently accelerate heterogenous workloads, on a homogenous fabric of processing cores. REDEFINE combines ASIC (Application Specific Integrated Circuit) like performance with the reconfigurability of FPGAs (Field Programmable Gate Arrays). Morphing Machines innovation enables dataflow compute, which is a paradigm shift in the current processor industry. Due to the nature of our architecture, we can cater across domains from Data Centers, Quantitative Finance, AI/ML acceleration, Edge Vision to High Performance Compute (HPC) applications, all with the same hardware fabric. At Morphing Machines, we are building a cutting-edge technology guided by our vision to build truly software-defined hardware.
Role Overview:
As the Senior FPGA Engineer, you will play a mission-critical role in integrating FPGA designs on both cloud-hosted (AWS F1/F2) and on-premise FPGA platforms. You will own the entire lifecycle of FPGA bring-up, from IP handoff and integration to multi-fabric orchestration and performance validation.
You will work closely with product, compiler, and orchestration teams to ensure FPGA-resident applications can be easily deployed, monitored, and benchmarked. Your responsibilities will include validating bitstreams, implementing communication pipelines, and enabling test/demo infrastructure across compute fabrics implemented over various FPGA s.
Key Responsibilities:
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FPGA Bring-Up & Bitstream Integration
- Interface with the IP team to integrate design drops into deployable bitstreams.
- Bring up bitstreams on AWS F1/F2 instances, Xilinx VCU platforms, or other compatible boards.
- Debug issues related to I/O wrapper logic, timing, etc.
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Platform and Tooling Integration
- Work with Switchboard and FireSim environments to support application execution across multiple FPGA boards.
- Contribute to building a Continuous Integration/Deployment (CI/CD)-like pipeline for FPGA validation and test deployment.
- Establish protocols to bring up and manage multi-FPGA topologies.
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Application Enablement and Profiling
- Support application developers in deploying and profiling workloads coded in C with Hardware specific pragmas on FPGA targets.
- Validate compute vs communication tradeoffs; capture latency, throughput, and power KPIs.
- Enable applications such as voxel pooling, BFS, and encrypted inference.
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Documentation and Enablement
- Document the end-to-end FPGA bring-up workflow, including toolchains, setup guides, debug logs, and issue trackers.
Required Skills and Qualifications:
Technical Skills:
- Strong experience with Xilinx toolchains (Vivado, Vitis) , FPGA flows and implementation of design across FPGA boards
- Hands-on exposure to cloud-based FPGA platforms such as AWS F1/F2
- Solid understanding of RTL development using Verilog/SystemVerilog
- Familiarity with memory controllers, timing analysis, and interface protocols
Tooling & Workflow Integration:
- Experience with FPGA integration in CI/CD environments
- Knowledge of simulation and emulation frameworks
- Understanding of software-hardware co-design and ability to assist with application bring-up (C/C++)
Soft Skills:
- Strong debugging and problem-solving skills
- Comfortable working in fast-paced, ambiguous environments
- Excellent communication and collaboration skills
- Ability to take ownership of integration across multiple teams
Education and Experience:
- Bachelor s or Master s degree in Electronics, Electrical, or Computer Engineering
- 10+ years experience in FPGA bring-up, hardware integration, or system-level FPGA projects
Preferred Skills (Bonus):
- Experience with Switchboard, FireSim, or multi-fabric orchestration
- Familiarity with compiler-level hardware mapping
- Understanding of OpenCL, LLVM, or machine-generated IR flows
- Ability to assist in building test infrastructure for cloud FPGA CI/CD
