Senior R&D Engineer - Computational Lithography

As a member of the Synopsys team in Bhubaneswar, Odisha, you will be contributing to the development of PVT Sensor IP, which plays a critical role in process, voltage, temperature, and other monitoring IPs within SOC subsystems. Synopsys is a market leader in these IP developments, integral parts of Silicon lifecycle monitoring. Key Responsibilities: - Contribute to the development and enhancement of layout design methodologies and best practices. - Collaborate with different function design leaders to understand/enhance processes and methodologies. - Work with internal infrastructure teams on compute grid, storage management, and job scheduling architecture. - Set up project environments by understanding CAD infrastructure and methodology. - Enhance quality assurance methodology by adding more quality checks/gatings. - Support internal tools development and automation to improve productivity across ASIC design cycles. - Evaluate and adopt new tools/technology and features with design engineers. - Ensure design integrity and manufacturability through physical verification and design rule checks. - Stay updated with industry trends and advancements in A&MS layout design. - Utilize tools like VC Spyglass, Verdi, SDF, Liberty, etc., and other frontend views. - Write RTL Code and TCL. Qualifications Required: - Bachelors or masters degree in engineering or a related field. - 2 to 3+ years of experience in A&MS frontend and backend views & collaterals development flows. - Proficiency in industry-standard EDA tools like Cadence Virtuoso or Synopsys Custom Compiler. - Exceptional knowledge of layout design methods, techniques, and methodologies. - Experience with physical verification tools such as Calibre or Assura. - Understanding of semiconductor process technologies and their impact on layout design. - Excellent problem-solving and systematic skills. - Ability to work effectively in a team-oriented environment. - Familiarity with Synopsys Tool set (such as FC/ICC2, Primetime, Formality, ICV). - Good communication and interpersonal skills. Join a dynamic and forward-thinking team at Synopsys, dedicated to developing cutting-edge PVT Sensor IPs and enhancing SOC subsystems. Your contributions will be valued as you work towards the common goal of driving innovation and success in the competitive semiconductor landscape.,