Senior Program manager IP Design

As a Program Manager at Qualcomm India Private Limited, you will play a crucial role in the Engineering Services Group. Your responsibilities will revolve around developing, defining, and executing plans of record, which includes managing schedules, budgets, resources, deliverables, and risks. Your role will also involve monitoring and driving the program from initiation through delivery, collaborating with internal and external stakeholders across functions on technical matters, and ensuring on-time delivery and achieving program milestones. Key Responsibilities: - Establish day-to-day operational objectives and organize interdepartmental activities to ensure program completion on schedule - Manage change control, escalations, and assess program/initiative issues and risks - Collaborate with stakeholders to resolve problems, identify risks, conduct team meetings, and keep the team informed of IP development/delivery status - Monitor product/program/project schedule compliance and interact with senior management on respective functional areas Qualifications Required: - Bachelor's degree in Electrical/Electronic Engineering, Computer Science, or related field - Experience in complete IP lifecycle development, domain knowledge on IP design, and technical expertise on components like DLL, PLL, LDO, ADC, DAC, and sensor design - Proficiency in RTL to GDS flow of digital IPs, spec to GDS flow for analog and mixed signal IPs, and complete ASIC lifecycle development - Strong Microsoft tools skills (Excel, Powerpoint, Word, MPP, PowerBI) and proven analytics skill in the VLSI domain - Established interpersonal skills, effective communication at all levels, and ability to synchronize and motivate engineering leads The ideal candidate should have 10+ years of experience, with at least 4 years in program management. A Master's degree in Engineering or Computer Science, PMP Certification, and 7+ years of program management experience are preferred. Domain knowledge of PDK components, IP quality assurance plan, test Chip design management, and experience with tools like MS_PowerBI, JIRA, and Confluence would be advantageous.,